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Samsung patents chip design with wiring on the back of the silicon

Samsung has filed a patent for a semiconductor structure that places wiring lines on the backside of the chip rather than just the top. The design uses specific insulating patterns to separate the wiring from the active parts of the transistor, allowing for tighter connections between the circuitry and the power supply.

Why it mattersThis is a routine improvement in chip manufacturing that helps engineers pack more components into smaller spaces by using the back of the silicon for connections.

In the filing’s own words

A semiconductor device includes a backside wiring line including a first side and a second side opposite to the first side in a first direction, a lower pattern on the first side of the backside wiring line, the lower pattern including a first side and a second side opposite to the first side in the first direction, where the second side of the lower pattern faces the backside wiring line, a sheet pattern on the first side of the lower pattern, and that is spaced apart from the lower pattern in the first direction, a first source/drain pattern on the lower pattern and connected to the sheet pattern, and an active region insulating pattern contacting the lower pattern, the active region insulating pattern including a line portion and a protruding portion, the line portion of the active region insulating pattern extending along the second side of the lower pattern.

What exactly they claim (claim 1)

1. A semiconductor device comprising: a backside wiring line comprising a first side and a second side opposite to the first side in a first direction; a lower pattern on the first side of the backside wiring line, the lower pattern comprising a first side and a second side opposite to the first side in the first direction, wherein the second side of the lower pattern faces the backside wiring line; a sheet pattern on the first side of the lower pattern, and that is spaced apart from the lower pattern in the first direction; a first source/drain pattern on the lower pattern and connected to the sheet pattern; an active region insulating pattern contacting the lower pattern, the active region insulating pattern comprising a line portion and a protruding portion, the line portion of the active region insulating pattern extending along the second side of the lower pattern, and the protruding portion of the active region insulating pattern protruding from the line portion of the active region insulating pattern toward the sheet pattern; and a backside source/drain contact connected to the first source/drain pattern and the backside wiring line, the backside source/drain contact being below the first source/drain pattern in the first direction.

Facts

Company
Samsung (SAMSUNG ELECTRONICS CO., LTD.)
Official title
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THEREOF
Publication number
US20260271353A1
Application number
19340031
Filed
Sep 25, 2025
Published
Sep 10, 2026
Inventors
4
Claims
20

Classified under

H10D 62/115 Electricity & electronicsH10D 30/0198 Electricity & electronicsH10D 30/502 Electricity & electronicsH10D 64/256 Electricity & electronicsH10W 20/427 Electricity & electronics
Read the full filing (official PDF) ↗ Open in the Patent Tracker

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.