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Samsung patents stacked memory chips with dummy plugs for better alignment

Samsung describes a method for stacking two semiconductor layers vertically to create a memory device. The design uses non-functional 'dummy' plugs and spacers to align the top layer with the bottom layer during assembly.

Why it mattersThis technique helps manufacturers build taller, more efficient memory chips by ensuring the layers bond correctly without damaging the active memory cells.

In the filing’s own words

Some embodiments provide a semiconductor device including a first structure including a substrate; and a second structure vertically overlapping the first structure and bonded to the first structure, wherein the first structure includes a memory cell structure disposed on the substrate; a first dummy plug spaced apart from the memory cell structure, electrically isolated from the memory cell structure, and extending in a vertical direction, on the substrate; and a first dummy interconnection structure connected to the first dummy plug, on the first dummy plug, and the second structure includes a semiconductor body; a second dummy plug penetrating the semiconductor body and connected to the first dummy interconnection structure; and an insulating spacer disposed between the semiconductor body and the second dummy plug.

What exactly they claim (claim 1)

1. A semiconductor device comprising: a first structure including a substrate; and a second structure vertically overlapping the first structure and bonded to the first structure, wherein the first structure includes: a memory cell structure on the substrate; a first dummy plug spaced apart from the memory cell structure, electrically isolated from the memory cell structure, and extending in a vertical direction, on the substrate; and a first dummy interconnection structure connected to the first dummy plug, on the first dummy plug, and the second structure includes: a semiconductor body; a second dummy plug penetrating the semiconductor body and connected to the first dummy interconnection structure; and an insulating spacer between the semiconductor body and the second dummy plug.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
SEMICONDUCTOR DEVICE INCLUDING FIRST AND SECOND STRUCTURES IN VERTICAL ARRANGEMENT
Publication number
US20260271280A1
Application number
19555610
Filed
Mar 3, 2026
Published
Sep 10, 2026
Inventors
2
Claims
20

Classified under

H10B 12/50 Electricity & electronicsH10B 12/09 Electricity & electronicsH10B 12/30 Electricity & electronics
Read the full filing (official PDF) ↗ Open in the Patent Tracker

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.