Samsung patents chip design with angled walls to improve memory structure
Samsung describes a semiconductor device where a vertical semiconductor pillar sits between two gate electrodes. The filing specifies that the side walls of this pillar are angled between 40 and 80 degrees relative to the outer walls, a geometric detail intended to optimize the internal structure of the chip.
In the filing’s own words
A semiconductor device includes a substrate including a cell active region and a boundary region; a bit line extending along a first direction parallel to a top surface of the substrate; a semiconductor pattern vertically extending to the top surface of the substrate; a back gate electrode extending along a second direction intersecting the first direction; and a gate electrode spaced apart from the back gate electrode in the first direction with the semiconductor pattern therebetween. The semiconductor pattern comprises a first outer wall extending in the second direction adjacent to the back gate electrode; a second outer wall opposite to the first outer wall in the first direction; and a first side wall connecting the first outer wall and the second outer wall. An angle between the first side wall and the first outer wall is in a range from 40° to 80°.
What exactly they claim (claim 1)
1. A semiconductor device, comprising: a substrate including a cell active region and a boundary region; a bit line extending along a first direction parallel to a top surface of the substrate; a semiconductor pattern extending along a direction perpendicular to the top surface of the substrate, wherein the semiconductor pattern is disposed on the bit line; a back gate electrode extending along a second direction parallel to the top surface of the substrate, wherein the second direction intersects the first direction; and a gate electrode spaced apart from the back gate electrode in the first direction, wherein the semiconductor pattern is between the gate electrode and the back gate electrode in the first direction, wherein the semiconductor pattern comprises: a first outer wall extending in the second direction, a second outer wall opposing the first outer wall in the first direction, wherein, in the first direction, the first outer wall is closer than the second outer wall to the back gate electrode, and a first side wall connecting the first outer wall and the second outer wall, and wherein an angle between the first side wall and the first outer wall is in a range from 40° to 80°.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- SEMICONDUCTOR DEVICE
- Publication number
- US20260271267A1
- Application number
- 19330318
- Filed
- Sep 16, 2025
- Published
- Sep 10, 2026
- Inventors
- 5
- Claims
- 20
Classified under
H10B 12/315 Electricity & electronicsH10B 12/05 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.