Samsung patents power circuit that balances current in storage chips
Samsung describes a power supply design for storage devices that uses two parallel circuits to manage electrical current. The system actively balances the current flow during startup or specific modes to ensure stability, then stops this balancing process once the device reaches a steady state.
In the filing’s own words
A parallel e-fuse device including: a first e-fuse to receive an input voltage and transfer a first fuse current to an output terminal; and a second e-fuse to receive the input voltage and transfer a second fuse current to the output terminal, the first e-fuse includes: a power transistor to control the first fuse current according to a gate voltage; a clamp amplifier to provide a charging current to charge a gate of the power transistor, the charging current being obtained by monitoring a feedback voltage; a balance amplifier to provide a first sinking current to discharge the gate of the power transistor, the first sinking current being obtained by comparing a current sensing signal with a current monitoring signal, wherein the clamp amplifier generates the charging current according to a differential voltage between the feedback voltage and a reference voltage.
What exactly they claim (claim 1)
1. A power supply device for supplying power to a storage device, comprising: a first e-fuse device receiving an input voltage and transferring a first fuse current to an output terminal; and a second e-fuse device connected in parallel with the first e-fuse device between the input voltage and the output terminal and transferring a second fuse current to the output terminal, wherein the first e-fuse device or the second e-fuse device activates a current balancing operation of the first fuse current and the second fuse current in a soft-start mode or a clamp mode of the power supply device, and disables the current balancing operation in a steady state mode.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- SERIAL INTERFACE RECEIVER AND AN OFFSET CALIBRATION METHOD THEREOF
- Publication number
- US20260268986A1
- Application number
- 19660560
- Filed
- Apr 28, 2026
- Published
- Sep 10, 2026
- Inventors
- 6
- Claims
- 20
Classified under
G11C 16/30 Physics & computingH03F 3/45475 Electricity & electronicsH03K 17/56 Electricity & electronicsMore from Samsung in Chips & hardware
- Samsung patents chip that combines camera and screen Oct 13, 2026
- Samsung patents faster chip testing using machine learning Sep 1, 2026
- Samsung patents radar method to pinpoint target direction more accurately Sep 1, 2026
- Samsung patents memory chip that searches data by content, not address Sep 1, 2026
- Samsung patents chip design that skips empty data to speed up AI Sep 1, 2026
Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.