Samsung patents stacked transistor design with protective insulation layer
Samsung describes a semiconductor structure where two transistor layers are stacked vertically to save space. The design includes a specific protective layer between the insulating material and the semiconductor parts to shield them during operation.
In the filing’s own words
A semiconductor device may include a first pattern and a second pattern extending in a first direction, a second semiconductor pattern on the first semiconductor pattern, a source/drain pattern connected to the first and second semiconductor patterns, a gate electrode extending in a second direction on the first semiconductor pattern and the second semiconductor pattern, the gate electrode including an inner electrode between the first semiconductor pattern and the second semiconductor pattern, a gate dielectric layer between the gate electrode and the first semiconductor pattern and between the gate electrode and the second semiconductor pattern, and an insulation pattern between the first semiconductor pattern and the first pattern, wherein the insulation pattern may include a dielectric pattern and a protection layer, the protection layer may be between the dielectric pattern and the first semiconductor pattern, and the protection layer may be between the dielectric pattern and the first pattern.
What exactly they claim (claim 1)
1. A semiconductor device, comprising: a first pattern extending in a first direction; a first semiconductor pattern on the first pattern; a second semiconductor pattern on the first semiconductor pattern; a source/drain pattern connected to the first semiconductor pattern and the second semiconductor pattern; a gate electrode extending in a second direction on the first semiconductor pattern and the second semiconductor pattern, the gate electrode including an inner electrode between the first semiconductor pattern and the second semiconductor pattern; a gate dielectric layer between the gate electrode and the first semiconductor pattern and between the gate electrode and the second semiconductor pattern; and an insulation pattern between the first semiconductor pattern and the first pattern, wherein the insulation pattern includes a dielectric pattern and a protection layer, the protection layer is between the dielectric pattern and the first semiconductor pattern, and the protection layer is between the dielectric pattern and the first pattern.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- SEMICONDUCTOR DEVICE
- Publication number
- US20260262268A1
- Application number
- 19655038
- Filed
- Apr 22, 2026
- Published
- Sep 3, 2026
- Inventors
- 7
- Claims
- 20
Classified under
H10D 62/121 Electricity & electronicsH10D 30/43 Electricity & electronicsH10D 30/6735 Electricity & electronicsH10D 30/6757 Electricity & electronicsH10D 62/80 Electricity & electronicsH10D 64/514 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.