Samsung patents chip capacitor design using a specific metal layer setup
Samsung describes a method for building tiny capacitors inside computer chips by placing a vertical metal connection, called a supervia, directly above a flat metal layer. This setup creates a small gap between the two metal parts, which acts as the capacitor that stores electrical charge. The design aims to create these components with high precision while using a specific arrangement of insulating materials.
In the filing’s own words
Semiconductor devices including a capacitor and methods of fabricating the semiconductor devices are disclosed. A semiconductor device includes an underlayer structure including a substrate onto which metal is patterned within a first dielectric material, wherein the patterned metal forms a first metal surface of the capacitor; a middle layer including a second dielectric material above the underlayer structure; an upper layer including a third dielectric material above the middle layer; and a supervia, formed though the upper layer and into the middle layer. The supervia is disposed in the second dielectric material of the middle layer above the patterned metal forming the first metal surface of the capacitor, and wherein a metal on the supervia forms a second metal surface of the capacitor above the first metal surface.
What exactly they claim (claim 1)
1. A semiconductor device including a capacitor, the semiconductor device comprising: an underlayer structure including a substrate onto which metal is patterned within a first dielectric material, wherein the patterned metal forms a first metal surface of the capacitor; a middle layer including a second dielectric material above the underlayer structure; an upper layer including a third dielectric material above the middle layer; and a supervia, formed though the upper layer and into the middle layer, wherein the supervia is disposed in the second dielectric material of the middle layer above the patterned metal forming the first metal surface of the capacitor, and wherein a metal on the supervia forms a second metal surface of the capacitor above the first metal surface.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- INTEGRATION SCHEME FOR FABRICATING HIGH PRECISION, LOW CAPACITOR WITH UNLANDED VIA
- Publication number
- US20260262235A1
- Application number
- 19655981
- Filed
- Apr 23, 2026
- Published
- Sep 3, 2026
- Inventors
- 2
- Claims
- 20
Classified under
H10D 1/692 Electricity & electronicsH10W 20/046 Electricity & electronicsH10W 20/077 Electricity & electronicsH10W 20/081 Electricity & electronicsH10W 20/496 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.