Samsung patents chip design using mismatched crystal structures
Samsung has filed a patent for a semiconductor device that combines different materials with varying atomic spacing. The design places a channel layer with a larger atomic grid over lower layers with smaller grids to create specific electrical properties.
In the filing’s own words
A semiconductor device, includes, a first active pattern includes a first lower portion and a first channel layer spaced apart from the first lower portion, a second active pattern includes a second lower portion and a second channel layer spaced apart from the second lower portion, a channel semiconductor layer on the first lower portion and the first channel layer, a first gate pattern on the channel semiconductor layer, a second gate pattern on the second lower portion and the second channel layer, a first source/drain pattern connected to the first lower portion, the first channel layer, the channel semiconductor layer, and the first gate pattern, and a second source/drain pattern connected to the second lower portion, the second channel layer, and the second gate pattern, a lattice constant of the channel semiconductor layer being greater than a lattice constant of each of the first and second active patterns.
What exactly they claim (claim 1)
1 - 32. (canceled)
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- SEMICONDUCTOR DEVICES HAVING GATE AND SOURCE/DRAIN PATTERNS
- Publication number
- US20260262219A1
- Application number
- 19665543
- Filed
- May 1, 2026
- Published
- Sep 3, 2026
- Inventors
- 6
- Claims
- 21
Classified under
H10B 12/50 Electricity & electronicsH10B 12/09 Electricity & electronicsH10B 12/315 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.