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Samsung patents chip package design with layer to stop cracks

Patent drawing
Patent drawing from the official filing.

Samsung has been granted a patent for a semiconductor package design that adds a specific "crack prevention layer" between existing wiring layers. This layer sits on top of insulating material and extends horizontally from the edges of the connection pads to help protect the chip structure. The design aims to improve the physical durability of the package by managing stress within the stacked layers.

Why it mattersThis is a routine engineering improvement that helps prevent physical damage to chips during manufacturing or use, ensuring more reliable electronics without changing how the device functions for the user.

In the filing’s own words

A semiconductor package may include a first wiring structure, a second wiring structure on the first wiring structure, a semiconductor chip between the first wiring structure and the second wiring structure, and an expanded structure that electrically connects the first wiring structure with the second wiring structure and surrounds the semiconductor chip. At least one of the first wiring structure and the second wiring structure may include a first insulating layer on the semiconductor chip and the expanded structure, a first wiring layer on the first insulating layer, a second insulating layer covering the first insulating layer and the first wiring layer, a crack prevention layer on the second insulating layer, and a second wiring layer on the second insulating layer and the crack prevention layer. The second wiring layer may include a pad portion.

What exactly they claim (claim 1)

1. A semiconductor package comprising: a first wiring structure; a second wiring structure on the first wiring structure; a semiconductor chip between the first wiring structure and the second wiring structure; and an expanded structure that electrically connects the first wiring structure with the second wiring structure and surrounds the semiconductor chip, wherein the first wiring structure or the second wiring structure includes a first insulating layer on the semiconductor chip and the expanded structure, a first wiring layer on the first insulating layer, a second insulating layer covering the first insulating layer and the first wiring layer, a crack prevention layer on the second insulating layer, and a second wiring layer on the second insulating layer and the crack prevention layer, the second wiring layer includes a pad portion, the crack prevention layer overlaps the pad portion in a vertical direction and extends from an edge of the pad portion in a horizontal direction in a plan view, and the crack prevention layer is spaced apart from the first wiring layer in the vertical direction with a portion of the second insulating layer therebetween in the vertical direction.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
Semiconductor package including crack prevention layer
Patent number
US12772886B2
Application number
18539949
Filed
Dec 14, 2023
Granted
Oct 20, 2026
Inventors
3
Claims
20

Classified under

H10W 70/65 Electricity & electronicsH10B 80/00 Electricity & electronicsH10W 90/00 Electricity & electronicsH10W 70/69 Electricity & electronicsH10W 72/884 Electricity & electronicsH10W 72/952 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.