Samsung patents chip design that routes power through zigzag gaps
This patent describes a layout for semiconductor chips where power lines run in specific rows. It places special 'power tap' cells in a staggered, zigzag pattern every few rows to connect the main power lines to structures on the back of the chip.
In the filing’s own words
A semiconductor device includes first power lines extending on a substrate in a first direction and spaced apart from each other in a second direction, back side power structures on a lower surface of the substrate, standard cells each including an active pattern, a gate pattern intersecting the active pattern, and contacts, power tap cells between at least some of the standard cells and each including vertical power vias, and second power lines electrically connecting at least some of the first power lines to each other. A first portion of the second power lines may extend onto the power tap cells and a second portion of the second power lines that is different from the first portion may extend onto the standard cells. The power tap cells may be arranged in every three or more rows of the standard cells in the second direction in a zigzag pattern.
What exactly they claim (claim 1)
1. A semiconductor device comprising: first power lines that extend on a substrate in a first direction, are spaced apart from each other in a second direction intersecting the first direction, and are on power rail tracks; back side power structures on a lower surface of the substrate; standard cells arranged in the first and second directions, wherein each of the standard cells comprises an active pattern that extends in the first direction, a gate pattern that intersects the active pattern and extends in the second direction, and contacts on opposing sides of the gate pattern, respectively; power tap cells between at least some of the standard cells, wherein each of the power tap cells comprises vertical power vias that are electrically connected to ones of the first power lines and ones of the back side power structures, respectively; and second power lines that extend in the second direction on the first power lines, wherein at least one of the second power lines electrically connects at least one of the first power lines that is on at least one of the power tap cells to one or more of the first power lines that are spaced apart from the at least one of the power tap cells in the second direction, wherein the power rail tracks define rows in the second direction, wherein the power tap cells are arranged in every three or more of the rows and are staggered with each other in the second direction, and wherein ones of the first power lines overlap respective ones of the vertical power vias.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- Semiconductor devices
- Patent number
- US12772826B2
- Application number
- 18582859
- Filed
- Feb 21, 2024
- Granted
- Oct 20, 2026
- Inventors
- 5
- Claims
- 20
Classified under
H10W 20/427 Electricity & electronicsH10D 30/43 Electricity & electronicsH10D 30/6735 Electricity & electronicsH10D 30/6757 Electricity & electronicsH10D 62/121 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.