Samsung patents chip design using two different metals for better connections
Samsung has been granted a patent for a specific way to build integrated circuits, or computer chips. The design uses a 'fin-type' structure where the electrical connections, or 'via contacts,' are made of two different metals stacked on top of each other. This setup connects the chip's active parts to the wiring lines above them.
In the filing’s own words
An integrated circuit device includes a substrate, a fin-type active region extending in a first horizontal direction on a first surface of the substrate, a source/drain region on the fin-type active region, an active contact on the source/drain region and electrically connected to the source/drain region, a wiring line extending at a vertical level higher than the source/drain region, a via contact penetrating an insulating layer on the source/drain region and serving as a medium of electrical connection between the active contact and the wiring line, and an adhesive layer between the wiring line and the insulating layer and contacting the wiring line, wherein the via contact includes a top via contact and a bottom via contact, the top via contact includes a metal different from a metal included in the bottom via contact, and the wiring line and the top via contact are in direct contact with each other.
What exactly they claim (claim 1)
1. An integrated circuit device comprising: a substrate; a fin-type active region extending in a first horizontal direction on a first surface of the substrate; a source/drain region on the fin-type active region; an active contact arranged on the source/drain region and electrically connected to the source/drain region; a wiring line extending at a vertical level higher than a vertical level of the source/drain region; a via contact penetrating an insulating layer on the source/drain region, wherein the active contact and the wiring line are electrically connected through the via contact; and an adhesive layer between the wiring line and the insulating layer, the adhesive layer directly contacting the wiring line, wherein the via contact comprises a top via contact and a bottom via contact, wherein the top via contact comprises a metal different from a metal included in the bottom via contact, and wherein the wiring line and the top via contact directly contact each other.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- Integrated circuit device
- Patent number
- US12772537B2
- Application number
- 18658176
- Filed
- May 8, 2024
- Granted
- Oct 20, 2026
- Inventors
- 5
- Claims
- 20
Classified under
H10D 64/62 Electricity & electronicsH10D 30/014 Electricity & electronicsH10D 30/43 Electricity & electronicsH10D 30/6729 Electricity & electronicsH10D 30/6735 Electricity & electronicsH10D 62/121 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.