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SamsungGranted patentChips & hardwareInterest 4/10

Samsung patents chip packaging design using bridge dies and redistribution layers

Patent drawing
Patent drawing from the official filing.

This patent describes a method for building semiconductor packages by stacking multiple small chips, known as chiplets, on a base layer. It uses a specific arrangement of connection points and a 'bridge die' to link these components together before covering them with protective material.

Why it mattersThis filing details a specific way to assemble complex computer chips, which could lead to more efficient manufacturing of future processors.

In the filing’s own words

A semiconductor package may include a first redistribution layer structure, a chiplet structure on the first redistribution layer structure, a plurality of first connection members on the first redistribution layer structure, a first molding material on the first redistribution layer structure and molding the chiplet structure and the plurality of first connection members, and a second redistribution layer structure on the first molding material. The chiplet structure may include a third redistribution layer structure, a first chiplet and a second chiplet on the third redistribution layer structure, and a bridge die on a bottom surface of the third redistribution layer structure.

What exactly they claim (claim 1)

1. A semiconductor package, comprising: a first redistribution layer structure; a chiplet structure on the first redistribution layer structure; a plurality of first connection members on the first redistribution layer structure; a first molding material on the first redistribution layer structure and molding the chiplet structure and the plurality of first connection members; and a second redistribution layer structure on the first molding material, wherein the chiplet structure includes a third redistribution layer structure, a first chiplet and a second chiplet on the third redistribution layer structure, and a bridge die on a bottom surface of the third redistribution layer structure.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
Semiconductor package and method for manufacturing the same
Patent number
US12765432B2
Application number
18623645
Filed
Apr 1, 2024
Granted
Oct 13, 2026
Inventors
4
Claims
20

Classified under

H10W 90/401 Electricity & electronicsH10W 74/117 Electricity & electronicsH10W 90/00 Electricity & electronicsH10W 90/724 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.