Samsung patents chip design with wiring on the back of the transistor
This patent describes a semiconductor structure where electrical connections are made to the bottom of the chip rather than the top. It uses a specific arrangement of insulating layers and metal contacts to link the wiring to the transistor's source and drain areas from below.
In the filing’s own words
A semiconductor device may include a backside wiring line in a first backside interlayer insulating film, a fin-type pattern on the backside wiring line, a second backside interlayer insulating film between the fin-type pattern and the first backside interlayer insulating film, a gate electrode on the fin-type pattern, a first source/drain pattern on a side of the gate electrode, and a backside source/drain contact in a backside contact hole defined by the fin-type pattern and the second backside interlayer insulating film. The backside source/drain contact may connect the backside wiring line and the first source/drain pattern. The backside source/drain contact may include an upper pattern and a lower pattern. The upper pattern may be between the lower pattern and the first source/drain pattern, and may fill at least a portion of the first backside contact hole. The upper pattern may have a single conductive film structure.
What exactly they claim (claim 1)
1. A semiconductor device comprising: a first backside interlayer insulating film; a backside wiring line in the first backside interlayer insulating film, the backside wiring line including a first surface and a second surface opposite each other in a first direction; a fin-type pattern on the first surface of the backside wiring line, the fin-type pattern extending in a second direction; a second backside interlayer insulating film between the fin-type pattern and the first backside interlayer insulating film, the fin-type type pattern and the second backside interlayer insulating film defining a backside contact hole, the backside contact hole including a first backside contact hole and a second backside contact hole in fluid communication with each other, the first backside contact hole being in the fin-type pattern on a bottom of the second backside contact hole, and the second backside contact hole being in the second backside interlayer insulating film; a gate electrode on the fin-type pattern and extending in a third direction; a first source/drain pattern on a first side of the gate electrode and on the fin-type pattern; a backside source/drain contact in the backside contact hole on the first surface of the backside wiring line, the backside source/drain contact connecting the backside wiring line and the first source/drain pattern, wherein the backside source/drain contact includes an upper pattern and a lower pattern, the upper pattern of the backside source/drain contact is between the lower pattern of the backside source/drain contact and the first source/drain pattern, the upper pattern of the backside source/drain contact fills at least a portion of the first backside contact hole, and the upper pattern of the backside source/drain contact has a single conductive film structure.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- Semiconductor device
- Patent number
- US12757443B2
- Application number
- 18441269
- Filed
- Feb 14, 2024
- Granted
- Oct 6, 2026
- Inventors
- 5
- Claims
- 20
Classified under
H10D 30/6729 Electricity & electronicsH10D 30/014 Electricity & electronicsH10D 30/43 Electricity & electronicsH10D 30/6735 Electricity & electronicsH10D 30/6757 Electricity & electronicsH10D 62/121 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.