Samsung patents faster way to fix data errors in digital signals
Samsung has been granted a patent for a decoder that fixes errors in received digital data using a specific pattern called spotty and adjacent symbol error. The system uses a syndrome generator to create three types of error checks and then maps these checks to locate and correct specific bits in a two-dimensional array. This method aims to simplify the decoding process by focusing on how errors cluster together rather than checking every single bit individually.
In the filing’s own words
A decoder includes a syndrome generator and an error pattern classifier. The syndrome generator generates a first syndrome, a second syndrome, and a third syndrome based on a reception vector and a parity check matrix and outputs the first syndrome, the second syndrome, and the third syndrome, The error pattern classifier receives the first syndrome, obtains symbol error location information obtained based on mapping information between a spotty and adjacent symbol error (SASE) and the first syndrome, changes the first syndrome to a normalized syndrome based on a first received symbol, obtains an adjacent error vector based on mapping information between the normalized syndrome, the second syndrome, and the third syndrome and the SASE, and corrects an error of the reception vector based on the symbol error location information and the adjacent error vector.
What exactly they claim (claim 1)
1. A decoder comprising: a syndrome generator configured to generate a first syndrome, a second syndrome, and a third syndrome based on a reception vector and a parity check matrix and to output the first syndrome, the second syndrome, and the third syndrome; a symbol error locator configured to receive the first syndrome and output symbol error location information obtained based on mapping information between a spotty and adjacent symbol error (SASE) and the first syndrome; a symbol normalizer configured to change the first syndrome to a normalized syndrome based on a first received symbol and to output the normalized syndrome; an adjacent error locator configured to receive the normalized syndrome from the symbol normalizer, to receive the second syndrome and the third syndrome from the syndrome generator, and to output an adjacent error vector; and an error corrector configured to receive the symbol error location information from the symbol error locator, to receive the adjacent error vector from the adjacent error locator, and to correct an error of the reception vector, wherein the SASE includes an error pattern based on adjacency between erroneous bits among bits in a 2-dimensional array, a number of error bits within the adjacency, and a length of the first received symbol.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- Low-complexity decoder and operation method thereof
- Patent number
- US12756406B2
- Application number
- 19019250
- Filed
- Jan 13, 2025
- Granted
- Oct 6, 2026
- Inventors
- 6
- Claims
- 20
Classified under
H03M 13/1105 Electricity & electronicsH03M 13/1148 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.