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Samsung patents memory calibration method using opposite phase clocks

Patent drawing
Patent drawing from the official filing.

This patent describes a method for calibrating the timing of data samplers in a memory device. It uses a calibration circuit to apply clock signals with opposite phases to different samplers to adjust their timing offsets.

Why it mattersThis improves the reliability of data storage by ensuring that memory chips read data at the precise correct moment.

In the filing’s own words

A semiconductor device according to an embodiment includes a plurality of sampler circuits configured to receive a plurality of offset clock signals or a plurality of divided clock signals and to sample a data signal in response to each of a plurality of divided clock signals. A calibration circuit applies a first offset clock signal to a first sampler circuit, applies a second offset clock signal having an opposite phase to the first offset clock signal to a second sampler circuit, and generates a first offset adjustment signal for adjusting an offset of the first sampler circuit based on an output of the first sampler circuit that is output in response to the first offset clock signal.

What exactly they claim (claim 1)

1. A memory system comprising: a memory controller configured to transmit a data signal and a data clock signal in synchronization with the data signal; and a memory device comprising: a clock control circuit configured to divide the data clock signal to generate a plurality of divided clock signals, a plurality of sampler circuits configured to sample the data signal in synchronization with the plurality of divided clock signals; a calibration circuit configured to provide a plurality of offset clock signals having an opposite phase to each other to the plurality of sampler circuits to perform offset calibration of the plurality of sampler circuits based on outputs of the plurality of sampler circuits generated in synchronization with the plurality of offset clock signals.

Facts

Company
Samsung (SAMSUNG ELECTRONICS CO., LTD.)
Official title
Methods and apparatus including sampler circuitry for performing offest calibration
Patent number
US12755769B2
Application number
18794825
Filed
Aug 5, 2024
Granted
Oct 6, 2026
Inventors
6
Claims
20

Classified under

G11C 7/222 Physics & computingG11C 7/06 Physics & computingG11C 7/1096 Physics & computing

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.