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Samsung patents memory chip power switch to save energy

Patent drawing
Patent drawing from the official filing.

Samsung has been granted a patent for a semiconductor memory device that uses a power management circuit to control electricity flow. The system connects different power rails depending on whether the memory is running at high or low speeds, cutting power to specific parts during standby modes.

Why it mattersThis design helps reduce energy waste in computer memory by turning off unused power lines when the chip is not working at full speed.

In the filing’s own words

A semiconductor memory device includes a first power supply unit configured to, in a normal mode of a high frequency operation, supply a first power from a first global power rail to a third global power rail and a fourth global power rail in a normal mode, and, in a standby mode of a high frequency option, supply the first power to the third global power rail and not supply the first power to the fourth global power rail, and, in a normal mode of a low frequency operation, supply a second power of a second global power rail to the third global power rail and the fourth global power rail, and, in a standby mode of a low frequency operation, supply the second power to the third global power rail and not supply the second power to the fourth global power rail.

What exactly they claim (claim 1)

1. A memory device comprising: a first global power rail connected to a first power terminal that supplies a first power voltage; a second global power rail connected to a second power terminal that supplies a second power voltage; a third global power rail; a fourth global power rail; and a power management circuit configured to receive a power down command from a controller, and change a normal mode of a high frequency operation into a standby mode of the high frequency operation in response to the power down command, wherein the power management circuit is configured to connect the first global power rail to the third global power rail and the fourth global power rail in the normal mode of the high frequency operation, and wherein the power management circuit is configured to connect the first global power rail to the third global power rail and disconnect the first global power rail from the fourth global power rail in the standby mode of the high frequency operation.

Facts

Company
Samsung (SAMSUNG ELECTRONICS CO., LTD.)
Official title
Semiconductor memory device including global power rails and memory system having the same
Patent number
US12755763B2
Application number
18654527
Filed
May 3, 2024
Granted
Oct 6, 2026
Inventors
2
Claims
20

Classified under

G11C 5/148 Physics & computingG11C 8/10 Physics & computingG11C 8/18 Physics & computing

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.