Microsoft patents network cards that mix fixed and flexible processing
Microsoft describes a network interface card design that combines two types of processing units: one flexible unit that can be reprogrammed for new tasks and one fixed unit built for specific, fast operations. The system uses software to decide which unit handles each network packet, allowing the card to switch between general-purpose flexibility and specialized speed.
In the filing’s own words
Implementations of architectures for network processing using a fixed-function logic per-op component close-coupled with programmable logic and software are provided. One aspect provides an integrated circuit device for network processing, the device comprising a composable processing pipeline that includes a programmable per-op component and a fixed-function logic per-op component that is close-coupled with programmable logic and software. The device further comprises a compute complex component comprising processing circuitry implementing the software for controlling the programmable per-op component and the fixed-function logic per-op component, wherein for a first processing pipeline, the processing circuitry is configured to perform a first function using the programmable per-op component, and for a second processing pipeline, the processing circuitry is configured to perform a second function using the fixed-function logic per-op component.
What exactly they claim (claim 1)
1. A network interface card comprising an integrated circuit device for network processing, the network interface card comprising: a composable processing pipeline comprising: a programmable per-op component; and a fixed-function logic per-op component configurable with programmable logic and software, wherein the programmable per-op component and the fixed-function logic per-op component provide functions for processing headers and metadata for network packets; and a compute complex component comprising processing circuitry implementing the software for controlling the programmable per-op component and the fixed-function logic per-op component, wherein: for a first composed processing pipeline, the processing circuitry is configured to perform a first function using the programmable per-op component while bypassing the fixed-function logic per-op component; and for a second composed processing pipeline, the processing circuitry is configured to perform a second function using the fixed-function logic per-op component while bypassing the programmable per-op component.
Facts
- Company
- Microsoft (Microsoft Technology Licensing, LLC)
- Official title
- Network processing using fixed-function logic components close-coupled with programmable logic and software
- Patent number
- US12754867B2
- Application number
- 18523492
- Filed
- Nov 29, 2023
- Granted
- Oct 6, 2026
- Inventors
- 5
- Claims
- 18
Classified under
G06F 13/4221 Physics & computingG06F 2213/0026 Physics & computingMore from Microsoft in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.