Samsung patents chip stack with built-in capacitors for better power flow
Samsung describes a semiconductor package design that stacks a lower chip, a middle layer called an interposer, and an upper chip. The interposer contains vertical wires and at least one capacitor positioned between the two chips to help manage electrical power.
In the filing’s own words
A semiconductor device and semiconductor package, the device including a lower semiconductor chip including a lower through-electrode; an interposer mounted on the lower semiconductor chip, the interposer including an interposer substrate; a plurality of interposer through-electrodes penetrating through at least a portion of the interposer substrate in a vertical direction and electrically connected to the lower through-electrode; and at least one capacitor in the interposer substrate and electrically connected to at least one interposer through-electrode of the plurality of interposer through-electrodes; and an upper semiconductor chip mounted on the interposer and electrically connected to the interposer through-electrode.
What exactly they claim (claim 1)
1. A semiconductor device, comprising: a lower semiconductor chip including a lower through-electrode; an interposer mounted on the lower semiconductor chip, the interposer including: an interposer substrate, and a plurality of interposer through-electrodes penetrating through at least a portion of the interposer substrate in a vertical direction and electrically connected to the lower through-electrode, wherein the interposer is free of active semiconductor devices; an upper semiconductor chip mounted on the interposer and electrically connected to the plurality of interposer through-electrodes; and at least one capacitor between the lower semiconductor chip and the upper semiconductor chip and electrically connected to at least one interposer through-electrode of the plurality of interposer through-electrodes.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- Semiconductor device and semiconductor package including the same
- Patent number
- US12751299B2
- Application number
- 18740888
- Filed
- Jun 12, 2024
- Granted
- Sep 29, 2026
- Inventors
- 1
- Claims
- 20
Classified under
H10W 70/611 Electricity & electronicsH10D 1/68 Electricity & electronicsH10D 84/212 Electricity & electronicsH10W 70/635 Electricity & electronicsH10W 90/00 Electricity & electronicsH10W 90/401 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.