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Samsung patents vertical chip design with mixed metal layers

Samsung describes a vertical semiconductor device where channel structures pass through layers of insulation. The design uses two different metal materials arranged in specific patterns between these layers to control electrical connections.

Why it mattersThis filing details a specific physical arrangement of metal and insulation layers, which is a standard method for improving the density and performance of computer chips.

In the filing’s own words

A vertical semiconductor device includes insulation patterns, channel structures, a first metal pattern structure and a second metal pattern. The insulation patterns are spaced apart from each other in a vertical direction. Each insulation pattern extends in a first direction parallel to the upper surface of a substrate. The channel structures pass through the insulation patterns. The first metal pattern structure include at least one first metal material, and extend in the first direction. The first metal pattern structure are positioned in a gap between adjacent insulation patterns in the vertical direction, and the first metal pattern structure is at a central portion of the gap. The second metal pattern includes a metal material that is different from the at least one first metal material, the second metal pattern may be on opposite sidewalls of the first metal pattern structure to fill a remainder portion of the gap.

What exactly they claim (claim 1)

1. A vertical semiconductor device, comprising: insulation patterns that are spaced apart from each other in a vertical direction perpendicular to an upper surface of a substrate, each of the insulation patterns extending in a first direction parallel to the upper surface of the substrate; channel structures on the substrate, the channel structures passing through the insulation patterns, the channel structures including first channel structures and second channel structures; a first metal pattern structure including at least one first metal material, and comprising a continuous portion of the first metal pattern structure having an elongated shape extending in the first direction, wherein the first metal pattern structure is located between adjacent insulation patterns of the insulation patterns in the vertical direction; and a second metal pattern including a metal material that is different from the at least one first metal material, the second metal pattern on opposite outer sidewalls of the elongated shape of the continuous portion of the first metal pattern structure in a second direction perpendicular to the first direction and parallel to the upper surface of the substrate, such that the continuous portion of the first metal pattern structure is between and in contact with separate portions of the second metal pattern in the second direction, wherein the first metal pattern structure contacts only the first channel structures among the first channel structures and the second channel structures, wherein, in a cross-sectional view of the first metal pattern structure and the second metal pattern taken along the second direction: a third channel structure, a fourth channel structure, and a fifth channel structure of the channel structures are arranged in sequence, the second metal pattern is between the third channel structure and the fourth channel structure, and between the fourth channel structure and the fifth channel structure, and the first metal pattern structure is present between the fourth channel structure and the fifth channel structure and absent between the third channel structure and the fourth channel structure.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
Vertical semiconductor devices
Patent number
US12751265B2
Application number
18055530
Filed
Nov 15, 2022
Granted
Sep 29, 2026
Inventors
3
Claims
17

Classified under

H10W 20/20 Electricity & electronicsH10B 43/27 Electricity & electronicsH10B 43/40 Electricity & electronicsH10W 20/425 Electricity & electronicsH10W 20/4403 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.