Samsung patents 3D memory design with narrower channels than contacts
Samsung describes a 3D semiconductor structure where memory channels are physically narrower than the electrical contacts that connect them. The design uses stacked layers of insulating and conductive materials to create vertical memory cells. This specific arrangement aims to optimize the physical layout of the memory component.
In the filing’s own words
Disclosed are semiconductor devices, electronic systems including the same, and methods of fabricating the same. The semiconductor device comprises a first gate stack structure including a first dielectric pattern and a first conductive pattern that are alternately stacked with each other, a memory channel structure including a first memory portion that penetrates the first gate stack structure, a through contact including a first through portion at a level the same as a level of the first memory portion, and a connection contact including a first connection portion at a level the same as the level of the first memory portion and the level of the first through portion. A minimum width of the first memory portion is less than a minimum width of the first through portion and a minimum width of the first connection portion.
What exactly they claim (claim 1)
1. A semiconductor device, comprising: a first gate stack structure including a first dielectric pattern and a first conductive pattern that are alternately stacked with each other; a memory channel structure including a first memory portion that penetrates the first gate stack structure; a through contact including a first through portion at a level the same as a level of the first memory portion; and a connection contact including a first connection portion at a level the same as the level of the first memory portion and the level of the first through portion, wherein a minimum width of the first memory portion is less than a minimum width of the first through portion and a minimum width of the first connection portion.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- Semiconductor device, electronic system including the same, and method of fabricating the same
- Patent number
- US12751010B2
- Application number
- 18208459
- Filed
- Jun 12, 2023
- Granted
- Sep 29, 2026
- Inventors
- 11
- Claims
- 20
Classified under
H10B 43/27 Electricity & electronicsH10B 41/10 Electricity & electronicsH10B 41/27 Electricity & electronicsH10B 41/35 Electricity & electronicsH10B 43/10 Electricity & electronicsH10B 43/35 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.