Microsoft patents layout methods for fault-tolerant quantum computers
The filing describes techniques to arrange quantum bits (qubits) on a 2D grid to make quantum computers more reliable. It explains how to simplify complex quantum calculations into specific patterns of measurements and operations that fit within the physical limits of the hardware.
In the filing’s own words
Disclosed herein are example layouts and layout generation techniques for fault-tolerant quantum computers. Example embodiments comprise methods for performing a layout reduction technique for fault-tolerant quantum computing. In certain embodiments, a layout of an arbitrary quantum circuit is reduced to a layout of exponents of a multiple qubit Pauli matrix and measurements of a multiple qubit Pauli matrix. In certain embodiments, qubits are marked as one of a data, interface, or ancilla qubit for a 2D nearest neighbor graph of qubit connectivity, and an ancilla-path is provided from a respective data qubit to a respective interface qubit.
What exactly they claim (claim 1)
1. A system, comprising: a quantum computer; and one or more classical-computing devices, at least some of the one or more classical computing devices being programmed to transform a quantum computation of the form C 2 M ( a, Z i ( 2)) C 1 exp ( i ϕZ i ( 1)) C 0 ❘ "\[LeftBracketingBar]" 0 〉 ⊗ n to a sequence of exponentials and measurements of the form: M ( a, P 2) exp ( i ϕ P 1) ❘ "\[LeftBracketingBar]" 0 〉 ⊗ n in which P 1 and P 2 are multiple qubit Pauli operators, M(a,P 2)=(I+aP 2)/2 denotes measurement of the multiple qubit Pauli operator P 2 with outcome a=±1, wherein/is the identity matrix, wherein P 1 = C 0 T Z i ( 1)) C 0, and P 2 = ( C 1 C 0) † M ( a, Z i ( 2)) C 1 C 0, construct a tree (V,E) with root node r∈V, the tree describing a 2D grid of qubits in which each vertex V describes a qubit in the 2D grid, and vertices describing nearest neighbor qubits in the 2D grid are connected by an edge in E; and configure the quantum computer comprising the 2D grid of qubits to implement the sequence of exponentials and measurements using: one-qubit measurements and one-qubit Clifford unitaries, either (A) controlled Z-gates or (B) two-qubit measurements on nearest neighbor qubits described by vertices connected by an edge in E, (A) or (B) being used to perform multi-target controlled Z-gates and each Clifford C and C † such that CZ r C † =P being constructed using multi-target controlled Z-gates, and single qubit rotations that are only performed on the qubits described by the root node r.
Facts
- Company
- Microsoft (Microsoft Technology Licensing, LLC)
- Official title
- Layouts for fault-tolerant quantum computers
- Patent number
- US12748905B2
- Application number
- 16428913
- Filed
- May 31, 2019
- Granted
- Sep 29, 2026
- Inventors
- 3
- Claims
- 7
Classified under
G06F 30/392 Physics & computingG06N 10/20 Physics & computingG06N 10/40 Physics & computingG06N 10/70 Physics & computingH03K 19/20 Electricity & electronicsMore from Microsoft in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.