Samsung patents stacked chips with special oxide layers for better bonding
Samsung has been granted a patent for a semiconductor package that stacks multiple chips vertically on a base. The design uses specific oxide layers on the top and bottom of each chip to create a strong bonding region where they connect.
In the filing’s own words
The semiconductor package, includes: a package substrate; a substrate adhesive member on the package substrate; a plurality of semiconductor chips stacked on the substrate adhesive member and including first and second semiconductor chips; and a conductive connection member connecting the package substrate and the semiconductor chips, each of the semiconductor chips including a semiconductor chip body, a chip pad, an upper oxide layer comprised of a first material and covering an upper surface of the semiconductor chip body and exposing a portion of an upper surface of the chip pad, and a lower oxide layer comprised of a second material and covering a lower surface of the semiconductor chip body, wherein the upper oxide layer of the first semiconductor chip has an oxide bonding region between the first material and the second material in a first region in contact with the lower oxide layer of the second semiconductor chip.
What exactly they claim (claim 1)
1. A semiconductor package, comprising: a package substrate; a substrate adhesive member disposed on the package substrate; a plurality of semiconductor chips stacked on the substrate adhesive member in a vertical direction perpendicular to an upper surface of the package substrate and disposed to be offset in a horizontal direction perpendicular to the vertical direction, the plurality of semiconductor chips including first and second semiconductor chips sequentially stacked; and a conductive connection member connecting the package substrate and the plurality of semiconductor chips, wherein each of the plurality of semiconductor chips includes a semiconductor chip body, a chip pad disposed in the semiconductor chip body, an upper oxide layer covering an upper surface of the semiconductor chip body and exposing a portion of an upper surface of the chip pad, and a lower oxide layer covering a lower surface of the semiconductor chip body, wherein the upper oxide layer comprises a first material, wherein the lower oxide layer comprises a second material, and wherein the upper oxide layer of the first semiconductor chip has an oxide bonding region between the first material and the second material in a first region in contact with the lower oxide layer of the second semiconductor chip.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- Semiconductor package having a plurality of semiconductor chips stacked on a semiconductor substrate
- Patent number
- US12745674B2
- Application number
- 17977100
- Filed
- Oct 31, 2022
- Granted
- Sep 22, 2026
- Inventors
- 3
- Claims
- 20
Classified under
H10W 90/00 Electricity & electronicsH10W 74/117 Electricity & electronicsH10W 72/353 Electricity & electronicsH10W 72/552 Electricity & electronicsH10W 72/5522 Electricity & electronicsH10W 72/884 Electricity & electronicsMore from Samsung in Chips & hardware
- Samsung patents chip that combines camera and screen Oct 13, 2026
- Samsung patents faster chip testing using machine learning Sep 1, 2026
- Samsung patents radar method to pinpoint target direction more accurately Sep 1, 2026
- Samsung patents memory chip that searches data by content, not address Sep 1, 2026
- Samsung patents chip design that skips empty data to speed up AI Sep 1, 2026
Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.