/Patent Tracker
SamsungGranted patentChips & hardwareInterest 4/10

Samsung patents stacked chip design with wires running through the middle

Samsung has been granted a patent for a semiconductor package that stacks two chips vertically to save space. The lower chip features wires that pass straight through its base, allowing electrical connections to be made from the bottom while the top chip connects to the bottom one via pads.

Why it mattersThis design helps manufacturers pack more computing power into smaller devices by stacking components rather than spreading them out.

In the filing’s own words

A semiconductor package includes a first semiconductor chip including a first bonding layer, the first bonding layer including a first chip pad and a first insulating layer covering a side surface of the first chip pad, a second semiconductor chip disposed below the first semiconductor chip and including a substrate having front and rear surfaces, the front surface forming a second bonding layer, and through-electrodes passing through the substrate and having protrusions protruding from the rear surface, the second bonding layer including a second chip pad contacting the first chip pad and a second insulating layer covering a side surface of the second chip pad, a redistribution layer disposed below the second semiconductor chip and electrically connected to the second semiconductor chip, vias disposed between the redistribution layer and the first semiconductor chip and disposed around the second semiconductor chip, and an encapsulant surrounding the second semiconductor chip, the redistribution layer, and the vias. The encapsulant may be in contact with the protrusions of the through-electrodes.

What exactly they claim (claim 1)

1. A semiconductor package comprising: a first semiconductor chip including a first bonding layer, the first bonding layer including a first chip pad and a first insulating layer covering a side surface of the first chip pad; a second semiconductor chip disposed below the first semiconductor chip and including a substrate having front and rear surfaces, a second bonding layer disposed on the front surface, and through-electrodes passing through the substrate and protruding from the rear surface to form protrusions, the second bonding layer including a second chip pad contacting the first chip pad and a second insulating layer covering a side surface of the second chip pad; a redistribution layer disposed below the second semiconductor chip and electrically connected to the second semiconductor chip; vias disposed between the redistribution layer and the first semiconductor chip and disposed around the second semiconductor chip; and an encapsulant surrounding the second semiconductor chip and the vias and covering an upper surface of the redistribution layer, wherein the encapsulant is in contact with the protrusions of the through-electrodes and the rear surface of the substrate.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
Semiconductor package including semiconductor chip having through-electrode
Patent number
US12745659B2
Application number
18380042
Filed
Oct 13, 2023
Granted
Sep 22, 2026
Inventors
2
Claims
20

Classified under

H10W 70/685 Electricity & electronicsH10W 90/00 Electricity & electronicsH10W 90/701 Electricity & electronicsH10W 74/00 Electricity & electronicsH10W 90/722 Electricity & electronicsH10W 90/792 Electricity & electronics
Read the full filing (official PDF) ↗ Open in the Patent Tracker

More from Samsung in Chips & hardware

Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.