Samsung patents chip design that wraps capacitors around wiring holes
Samsung has been granted a patent for a logic device that integrates capacitors directly into the chip's insulating layers. The design features a capacitor structure that continuously extends through vertical holes and along the surface around them, with specific width ratios relative to the wiring.
In the filing’s own words
A logic device includes a substrate; at least one first insulating layer on the substrate; a second insulating layer on the at least one first insulating layer; and a capacitor portion in the at least one first insulating layer and the second insulating layer, wherein the at least one first insulating layer includes a plurality of through-holes, the capacitor portion includes a capacitor structure including a lower electrode, a dielectric film, and an upper electrode, and the capacitor structure continuously extends along the inside of the plurality of through-holes and along an upper surface of the at least one first insulating layer around the plurality of through-holes.
What exactly they claim (claim 1)
1. A logic device, comprising: a substrate; at least one first insulating layer on the substrate, the at least one first insulating layer including a plurality of through-holes therein; a second insulating layer on the at least one first insulating layer; wires in the at least one first insulating layer and the second insulating layer; and a capacitor portion in the at least one first insulating layer and the second insulating layer, the capacitor portion including a capacitor structure with a lower electrode, a dielectric film, and an upper electrode, and the capacitor structure continuously extending inside the plurality of through-holes of the at least one first insulating layer and along an upper surface of the at least one first insulating layer around each of the plurality of through-holes, wherein a ratio of a width of each of the plurality of through-holes to a width of each of the wires is 1:5 to 1:10.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- Logic device and manufacturing method thereof
- Patent number
- US12745408B2
- Application number
- 18234517
- Filed
- Aug 16, 2023
- Granted
- Sep 22, 2026
- Inventors
- 7
- Claims
- 18
Classified under
H10D 1/716 Electricity & electronicsH03K 19/08 Electricity & electronicsH10D 1/042 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.