Samsung patents 3D memory using silicon-germanium oxide at the bottom of channels
Samsung has secured a patent for a vertical semiconductor design used in 3D memory chips. The invention places a specific layer of silicon-germanium oxide at the bottom of the vertical channel to support the data storage structure.
In the filing’s own words
A vertical semiconductor device may include a substrate, a pattern structure on the substrate, and a channel structure in a channel hole passing through the pattern structure. The pattern structure may include insulation patterns and gate structures alternately stacked in a vertical direction perpendicular to an upper surface of the substrate. The channel structure may extend in the vertical direction. The channel structure may include a data storage structure on an inner surface of the channel hole, a channel contacting the data storage structure, a lower pattern on the channel positioned at a lower portion of the channel hole, and a filling insulation pattern on the channel and the lower pattern. The channel may have a cylindrical shape. The lower pattern may include an oxide including silicon and germanium.
What exactly they claim (claim 1)
1. A semiconductor device, comprising: a substrate; a pattern structure on the substrate, the pattern structure including insulation patterns and gate structures alternately stacked in a vertical direction perpendicular to an upper surface of the substrate; and a channel structure in a channel hole passing through the pattern structure, and the channel structure extending in the vertical direction, wherein the channel structure includes a data storage structure on an inner surface of the channel hole, a channel contacting the data storage structure, and having a cylindrical shape, a lower pattern on a bottom surface of the channel positioned at a lower portion of the channel hole, the lower pattern including an oxide including silicon and germanium, and a filling insulation pattern on the channel and the lower pattern.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- Vertical semiconductor device with lower pattern comprising silicon and germanium
- Patent number
- US12745396B2
- Application number
- 18166854
- Filed
- Feb 9, 2023
- Granted
- Sep 22, 2026
- Inventors
- 2
- Claims
- 15
Classified under
H10B 43/27 Electricity & electronicsMore from Samsung in Chips & hardware
- Samsung patents chip that combines camera and screen Oct 13, 2026
- Samsung patents faster chip testing using machine learning Sep 1, 2026
- Samsung patents radar method to pinpoint target direction more accurately Sep 1, 2026
- Samsung patents memory chip that searches data by content, not address Sep 1, 2026
- Samsung patents chip design that skips empty data to speed up AI Sep 1, 2026
Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.