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SamsungGranted patentChips & hardwareInterest 3/10

Samsung patents chip method using layered mask to carve memory lines

This patent describes a way to build memory chips by stacking several metal layers and covering them with a specific three-part mask. The mask helps carve out thin wires called bit lines, while insulating material is added to the gaps between them to keep the structure stable.

Why it mattersIt is a routine improvement in chip manufacturing that helps create denser and more reliable memory components.

In the filing’s own words

A method of manufacturing an integrated circuit device includes forming multiple conductive layers on an upper surface of a substrate, forming a capping structure arranged on the multiple conductive layers and extending in a first direction, forming a plurality of bit lines extending in the first direction by patterning the multiple conductive layers using the capping structure, and forming a plurality of buried layers in a space between neighboring bit lines of the plurality of bit lines. The capping structure includes a lower insulating capping layer, an insulating layer disposed on the lower insulating capping layer, and a polysilicon layer disposed on the insulating layer. The polysilicon layer includes a material having an etch selectivity with respect to the insulating layer.

What exactly they claim (claim 1)

1. A method of manufacturing an integrated circuit device, the method comprising: forming multiple conductive layers on an upper surface of a substrate; forming a capping structure disposed on the multiple conductive layers and extending in a first direction; forming a plurality of bit lines, each extending in the first direction, by patterning the multiple conductive layers using the capping structure; and forming a plurality of buried layers in a space between neighboring bit lines of the plurality of bit lines, wherein the capping structure comprises a lower insulating capping layer disposed directly on an uppermost layer of the multiple conductive layers, an insulating layer disposed directly on the lower insulating capping layer, and a polysilicon layer disposed directly on the insulating layer, and wherein the polysilicon layer comprises a material having an etch selectivity with respect to the insulating layer.

Facts

Company
Samsung (SAMSUNG ELECTRONICS CO., LTD.)
Official title
Integrated circuit device and method of manufacturing the same
Patent number
US12745382B2
Application number
18308453
Filed
Apr 27, 2023
Granted
Sep 22, 2026
Inventors
1
Claims
20

Classified under

H10B 12/033 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.