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Microsoft patents memory layout that checks data errors faster

Microsoft describes a method for organizing data in computer memory to detect errors more efficiently. The system splits memory into sections, storing user data separately from a specific type of error-checking code called a CRC, which helps verify data integrity without using extra space.

Why it mattersThis improves how computers handle data reliability, potentially making memory operations slightly more efficient for servers and high-performance devices.

In the filing’s own words

Implementations for simplified and efficient error correction code schemes with multiple codewords are provided. One aspect includes a computing system comprising: processing circuitry and memory storing instructions that, during execution, causes the processing circuitry to: encode data comprising user data and metadata in a memory module comprising a plurality of dies by: logically partitioning the memory module into a plurality of partitions; on a first partition: storing a first portion of the user data on one or more memory segments of the first partition; and storing a first cyclic redundancy check (CRC) codeword and the metadata on a memory segment of the first partition different from the one or more memory segments of the first partition, wherein the first CRC codeword is generated based on the first portion of the user data and the metadata; and storing parity data on one of the plurality of dies.

What exactly they claim (claim 1)

1. A computing system for implementing an asymmetric error correction code scheme with multiple codewords, the computing system comprising: processing circuitry and memory storing instructions that, during execution, causes the processing circuitry to: encode data comprising user data and metadata in a memory module comprising a plurality of dies by: logically partitioning the memory module into a plurality of partitions, wherein each partition comprises a plurality of memory segments that includes a memory segment from each of the plurality of dies; on a first partition of the plurality of partitions: storing a first portion of the user data on one or more memory segments of the first partition; and storing a first cyclic redundancy check (CRC) codeword and the metadata on a memory segment of the first partition different from the one or more memory segments of the first partition, wherein the first CRC codeword is generated based on the first portion of the user data and the metadata; and storing parity data on one of the plurality of dies.

Facts

Company
Microsoft (Microsoft Technology Licensing, LLC)
Official title
Simplified efficient error correction code schemes using multiple codewords
Patent number
US12743337B2
Application number
18934144
Filed
Oct 31, 2024
Granted
Sep 22, 2026
Inventors
3
Claims
20

Classified under

G06F 11/1004 Physics & computingG06F 11/1048 Physics & computing

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.