/Patent Tracker
MicrosoftGranted patentChips & hardwareInterest 4/10

Microsoft patents method to auto-generate code for 5G server accelerators

Microsoft has patented a method that allows a central processor in a 5G network server to automatically generate specific code for various hardware accelerators. The system identifies common tasks in the network software and translates them into instructions that each specific chip can understand, without needing pre-written programs for every device.

Why it mattersThis improves the efficiency of 5G infrastructure by allowing servers to dynamically offload work to the best available hardware, reducing the need for manual coding for each specific processor type.

In the filing’s own words

Systems and methods are provided for offloading a task from a central processor in a radio access network (RAN) server to one or more heterogeneous accelerators. For example, a task associated with one or more operational partitions (or a service application) associated with processing data traffic in the RAN is dynamically allocated for offloading from the central processor based on workload status information. One or more accelerators are dynamically allocated for executing the task, where the accelerators may be heterogeneous and my not comprise pre-programming for executing the task. The disclosed technology further enables generating specific application programs for execution on the respective heterogeneous accelerators based on a single set of program instructions. The methods automatically generate the specific application programs by identifying common functional blocks for processing data traffic and mapping the functional blocks to the single set of program instructions to generate code native to the respective accelerators.

What exactly they claim (claim 1)

1. A computer-implemented method for generating instruction code for a plurality of accelerators for execution on one or more radio access network (RAN) servers in a RAN comprising: receiving, by a central processor of a RAN server of the one or more RAN servers, a set of application code, wherein the set of application code performs a task of the RAN server by calling an application programming interface (API), wherein the API comprises mapping of accelerator-agnostic task instruction codes into accelerator-specific executables of an accelerator of the plurality of accelerators; identifying, based on the set of application code, a common functional block of one or more common functional blocks for executing at least a part of the set of application code in one or more accelerators of the plurality of accelerators, wherein the one or more common functional blocks represent an abstraction layer of functionalities provided by the plurality of accelerators; identifying, based on the identified common functional block, an accelerator of the plurality of accelerators in the one or more RAN servers; creating an accelerator-specific executable of the identified accelerator by translating, based on the mapping of the API, an accelerator-agnostic task instruction code as a part of the set of application code that corresponds to the identified common functional block into the accelerator-specific executable; scheduling, based on a workload of the central processor of the RAN server, the accelerator-specific executable of the identified accelerator to offload processing of the set of application code from the central processor of the RAN server to the identified accelerator; and dynamically offload, based on the scheduling, at least by loading the created accelerator-specific executable to the identified accelerator, performing the task from the central processor of the RAN server to the identified accelerator by executing the accelerator-specific executable to process network data.

Facts

Company
Microsoft (Microsoft Technology Licensing, LLC)
Official title
Methods for generating instruction code for heterogeneous accelerators for execution on radio-access-network servers based on common functional blocks
Patent number
US12743314B2
Application number
18629418
Filed
Apr 8, 2024
Granted
Sep 22, 2026
Inventors
1
Claims
20

Classified under

G06F 9/5044 Physics & computingG06F 9/5055 Physics & computingG06F 9/5066 Physics & computingH04W 28/0933 Electricity & electronics
Read the full filing (official PDF) ↗ Open in the Patent Tracker

More from Microsoft in Chips & hardware

Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.