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SamsungGranted patentChips & hardwareInterest 3/10

Samsung patents chip design with switchable buffers for data and clock signals

Samsung has been granted a patent for a semiconductor device that manages how data and clock signals move between the chip's core and its external connections. The design includes specific buffers and switch elements that connect the signal drivers to the transmission pads, allowing the core circuit to control the flow of information.

Why it mattersThis is a routine improvement in chip architecture that helps manage signal integrity, which is standard practice for maintaining reliable performance in electronic components.

In the filing’s own words

Provided is a semiconductor device including a first transmission pad configured to output a data signal; a second transmission pad configured to output a clock signal; a data transmission circuit connected to the first transmission pad and comprising a data driver configured to generate the data signal; a clock transmission circuit connected to the second transmission pad and comprising a clock driver configured to generate the clock signal; a core circuit configured to control the data driver and the clock driver; and at least one buffer, wherein each buffer of the at least one buffer comprises: an input terminal connected to at least one of an output terminal of the data driver and an output terminal of the clock driver; and an output terminal connected to the core circuit.

What exactly they claim (claim 1)

1. A semiconductor device comprising: a first transmission pad configured to output a data signal; a second transmission pad configured to output a clock signal; a data transmission circuit connected to the first transmission pad and comprising a data driver configured to generate the data signal; a clock transmission circuit connected to the second transmission pad and comprising a clock driver configured to generate the clock signal; a core circuit configured to control the data driver and the clock driver; at least one buffer, wherein each buffer of the at least one buffer comprises: an input terminal connected to at least one of an output terminal of the data driver and an output terminal of the clock driver; and an output terminal connected to the core circuit; and at least one switch element connected between the output terminal of the data driver or the output terminal of the clock driver and a corresponding one of the first transmission pad and the second transmission pad, wherein the input terminal of the at least one buffer is connected to the at least one switch element.

Facts

Company
Samsung (SAMSUNG ELECTRONICS CO., LTD.)
Official title
Semiconductor device and semiconductor package
Patent number
US12742817B2
Application number
18658529
Filed
May 8, 2024
Granted
Sep 22, 2026
Inventors
1
Claims
20

Classified under

G01R 31/2884 Physics & computingH10W 70/611 Electricity & electronicsH10W 70/65 Electricity & electronicsH10W 90/00 Electricity & electronicsH10W 90/724 Electricity & electronics
Read the full filing (official PDF) ↗ Open in the Patent Tracker

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.