Samsung patents 3D chip design that stacks logic dies vertically
Samsung has been granted a patent for a system on chip (SoC) that stacks two logic dies vertically on a package substrate. The design uses vertical interconnection vias to connect the lower die to an external memory device, bypassing the upper die.
In the filing’s own words
Provided are a system on chip (SoC) having a three-dimensional (3D) chiplet structure, and an electronic device including the SoC. The electronic device includes a printed circuit board, the SoC on the printed circuit board, and a memory device on the SoC, wherein the SoC includes an SoC package substrate, a first die arranged on the SoC package substrate, and having a logic circuit thereon, and a second die arranged on the first die, and having a logic circuit thereon.
What exactly they claim (claim 1)
1. An electronic device comprising: a printed circuit board; a system on chip (SoC) on the printed circuit board; and a memory device on the SoC; an interconnection via; and an interposer substrate between the SoC and the memory device, electrically connecting the SoC to the memory device, wherein the SoC comprises a SoC package substrate; a first die on the SoC package substrate, and having a logic circuit thereon; and a second die on the first die, and having a logic circuit thereon, wherein the interconnection via vertically extends in a direction from a contact location with the first die within the SoC to an external surface of the SoC facing the memory device penetrating the interposer substrate, the contact location being outside an outermost perimeter of the second die.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- System on chip having three-dimensional chiplet structure and electronic device including the system on chip
- Patent number
- US12740478B2
- Application number
- 17887587
- Filed
- Aug 15, 2022
- Granted
- Sep 15, 2026
- Inventors
- 4
- Claims
- 19
Classified under
H10W 90/00 Electricity & electronicsG11C 5/147 Physics & computingH10W 72/823 Electricity & electronicsH10W 90/291 Electricity & electronicsH10W 90/722 Electricity & electronicsH10W 90/724 Electricity & electronicsMore from Samsung in Chips & hardware
- Samsung patents chip that combines camera and screen Oct 13, 2026
- Samsung patents faster chip testing using machine learning Sep 1, 2026
- Samsung patents radar method to pinpoint target direction more accurately Sep 1, 2026
- Samsung patents memory chip that searches data by content, not address Sep 1, 2026
- Samsung patents chip design that skips empty data to speed up AI Sep 1, 2026
Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.