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SamsungGranted patentChips & hardwareInterest 3/10

Samsung patents chip package design with extra support pillars

Samsung has been granted a patent for a specific way to build semiconductor packages, which are the protective housings for computer chips. The design adds non-electrical support pillars between the chip and the base to help cover the wiring underneath. These extra pillars sit alongside the electrical connections to stabilize the structure.

Why it mattersThis is a routine engineering improvement aimed at making chip packaging more stable during manufacturing and use, which is a standard part of the process for producing modern electronics.

In the filing’s own words

Some embodiments of the present disclosure provide a semiconductor package including: a package substrate including a main pad and a main wiring pattern; a semiconductor chip on the package substrate; a plurality of connection bumps between the package substrate and the semiconductor chip and including a plurality of connection solder patterns on the main pad and a plurality of connection pillars on the connection solder patterns; a dummy insulating pattern between the package substrate and the semiconductor chip and configured to cover the main wiring pattern; and a plurality of dummy pillars on the dummy insulating pattern, wherein the dummy pillars are in contact with the dummy insulating pattern, and are electrically insulated from the dummy insulating pattern.

What exactly they claim (claim 1)

1. A semiconductor package comprising: a package substrate including a main pad and a main wiring pattern; a semiconductor chip on the package substrate; a plurality of connection bumps between the package substrate and the semiconductor chip and including a plurality of connection solder patterns on the main pad and a plurality of connection pillars on the connection solder patterns; a dummy insulating pattern between the package substrate and the semiconductor chip and configured to cover the main wiring pattern; and a plurality of dummy pillars on the dummy insulating pattern, wherein the dummy pillars are in contact with the dummy insulating pattern, and are electrically insulated from the dummy insulating pattern.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
Semiconductor package
Patent number
US12740465B2
Application number
18437895
Filed
Feb 9, 2024
Granted
Sep 15, 2026
Inventors
1
Claims
20

Classified under

H10W 72/20 Electricity & electronicsH10W 72/30 Electricity & electronicsH10W 72/851 Electricity & electronicsH10W 72/07254 Electricity & electronicsH10W 72/227 Electricity & electronicsH10W 72/244 Electricity & electronics
Read the full filing (official PDF) ↗ Open in the Patent Tracker

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.