Samsung patents chip package design with angled metal connections

1. A semiconductor package, comprising: a lower substrate; a lower semiconductor chip mounted on the lower substrate; a redistribution layer on the lower semiconductor chip; an upper semiconductor chip mounted on the redistribution layer; and a through electrode on one side of the lower semiconductor chip, the through electrode connecting the lower substrate to the redistribution layer, wherein the lower substrate includes, a first dielectric layer, a first conductive pattern on the first dielectric layer, the first conductive pattern having a wiring pattern and an under-bump pattern, wherein the wiring pattern and the under-bump pattern are horizontally spaced apart from each other, wherein the wiring pattern is above a top surface of the first dielectric layer, and wherein the under-bump pattern extends from the top surface of the first dielectric layer at least partially through the first dielectric layer, a second dielectric layer on the first dielectric layer, the second dielectric layer covering the first conductive pattern, and a second conductive pattern on the second dielectric layer, wherein the under-bump pattern includes, a first head part horizontally extending on the first dielectric layer, and a first tail part vertically penetrating the first dielectric layer and being exposed on a bottom surface of the first dielectric layer, wherein the first head part of the under-bump pattern has a first lateral surface on the first dielectric layer, the first lateral surface being inclined relative to the top surface of the first dielectric layer, wherein the second conductive pattern has a second lateral surface on the second dielectric layer, the second lateral surface being perpendicular to a top surface of the second dielectric layer, and wherein the second conductive pattern includes a second head part horizontally extending over the second dielectric layer, and a second tail part vertically penetrating the second dielectric layer and coupled to the first conductive pattern, wherein the second lateral surface is a lateral surface of the second head part.