Samsung patents chip design with nitrogen-doped insulating spacers
Samsung has been granted a patent for an integrated circuit design that uses a specific insulating structure around the gate and source/drain regions of a fin-type transistor. The invention describes a single-film spacer made of silicon oxycarbide doped with a small amount of nitrogen, which is shaped to cover the sides of the gate and partially cover the source/drain area.
In the filing’s own words
An integrated circuit device includes a gate line disposed on a fin-type active region, a source/drain region disposed on the fin-type active region, and an insulating spacer structure that covers the gate line and the source/drain region. The insulating spacer structure includes a first spacer portion that covers the sidewall of the gate line, a second spacer portion integrally connected to the first spacer portion, where the second spacer portion protrudes in a first lateral direction and covers a partial region of a sidewall of the source/drain region, and a spacer corner portion that fills a corner space defined by the gate line and the source/drain region between the first spacer portion and the second spacer portion. The insulating spacer structure has a single film structure that includes a SiOC film doped with about 0 at % to about 5 at % of nitrogen atoms.
What exactly they claim (claim 1)
1. An integrated circuit device, comprising: a fin-type active region that extends along a first lateral direction on a substrate; a pair of gate lines that extend along a second lateral direction on the fin-type active region, wherein the second lateral direction intersects the first lateral direction; a source/drain region disposed on the fin-type active region and interposed between the pair of gate lines; and a pair of insulating spacer structures that cover the pair of gate lines and the source/drain region, wherein each insulating spacer structure of the pair of insulating spacer structures comprises: a first spacer portion that covers a sidewall of one gate line of the pair of gate lines, wherein the first spacer portion extends along the second lateral direction; a second spacer portion integrally connected to the first spacer portion, wherein the second spacer portion protrudes in the first lateral direction and covers a partial region of a sidewall of the source/drain region; and a spacer corner portion that fills corner spaces defined by the one gate line and the source/drain region between the first spacer portion and the second spacer portion, wherein each insulating spacer structure of the pair of insulating spacer structures has a single film structure that includes a silicon oxycarbide (SiOC) film doped with about 0 at % to about 5 at % of nitrogen atoms, and wherein, in each insulating spacer structure of the pair of insulating spacer structures, the second spacer portion has a planar shape of which a width in the second lateral direction that gradually decreases with increasing distance in the first lateral direction from the one gate line.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- Integrated circuit device
- Patent number
- US12740130B2
- Application number
- 18471260
- Filed
- Sep 20, 2023
- Granted
- Sep 15, 2026
- Inventors
- 4
- Claims
- 18
Classified under
H10D 64/671 Electricity & electronicsH10D 30/014 Electricity & electronicsH10D 30/43 Electricity & electronicsH10D 30/6729 Electricity & electronicsH10D 30/6735 Electricity & electronicsH10D 62/121 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.