Samsung patents chip design with bottom-side wiring spacers
Samsung describes a semiconductor layout where electrical connections are made to the bottom of the chip instead of just the top. It includes small insulating spacers that keep these bottom connections from touching other parts of the circuit.
In the filing’s own words
A semiconductor device includes: a 1 st source/drain region; a 2 nd source/drain region; a channel structure connecting the 1 st source/drain region to the 2 nd source/drain region; a gate structure configured to control the channel structure; a backside source/drain contact structure connected to a bottom surface of the 1 st source/drain region; a backside isolation structure at a lower portion of the semiconductor device; and a 1 st contact spacer on the backside source/drain contact structure, wherein the 1 st contact spacer is configured to isolate the backside source/drain contact structure from another circuit element in the backside isolation structure.
What exactly they claim (claim 1)
1. A semiconductor device comprising: a 1 st source/drain region; a 2 nd source/drain region; a channel structure connecting the 1 st source/drain region to the 2 nd source/drain region; a gate structure configured to control the channel structure; a backside gate contact structure connected to a bottom surface of the gate structure; a backside isolation structure at a lower portion of the semiconductor device; a backside source/drain contact structure connected to a bottom surface of the 1 st source/drain region in the backside isolation structure; a 1 st contact spacer on the backside source/drain contact structure, wherein the 1 st contact spacer is configured to isolate the backside source/drain contact structure from another circuit element in the backside isolation structure, and wherein the backside isolation structure is formed between the backside gate contact structure and the 1 st contact spacer and isolates the backside gate contact structure from the 1 st contact spacer.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- Semiconductor device including backside source/drain contact structure with contact spacer and backside gate contact structure
- Patent number
- US12740122B2
- Application number
- 18380951
- Filed
- Oct 17, 2023
- Granted
- Sep 15, 2026
- Inventors
- 3
- Claims
- 15
Classified under
H10D 64/017 Electricity & electronicsH10D 30/014 Electricity & electronicsH10D 30/43 Electricity & electronicsH10D 30/6735 Electricity & electronicsH10D 30/6757 Electricity & electronicsH10D 62/116 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.