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Samsung patents 3D chip design with wider upper layers

Samsung has been granted a patent for a semiconductor device structure that stacks memory and processing components vertically. The design features a peripheral section that is wider at the top than at the bottom, sitting alongside the main memory cells.

Why it mattersThis is a technical improvement in chip manufacturing that helps engineers pack more components into smaller spaces, which is standard practice for making faster and denser processors.

In the filing’s own words

A semiconductor device is provided. The semiconductor device includes: a lower structure including a bit line; a cell semiconductor body vertically overlapping the bit line, on the lower structure; a peripheral semiconductor body including a portion disposed on a same level as at least a portion of the cell semiconductor body, on the lower structure; and a peripheral gate on the peripheral semiconductor body, wherein the peripheral semiconductor body includes a lower region having a first width and an upper region having a second width, greater than the first width on the lower region.

What exactly they claim (claim 1)

1. A semiconductor device, comprising: a lower structure including a bit line; a cell semiconductor body on the lower structure and vertically overlapping the bit line; a peripheral semiconductor body on the lower structure, the peripheral semiconductor body including a portion disposed at a same level as at least a portion of the cell semiconductor body; and a peripheral gate on the peripheral semiconductor body, wherein the peripheral semiconductor body includes a lower region having a first width and an upper region having a second width, wherein the upper region is on the lower region, and wherein the second width is greater than the first width.

Facts

Company
Samsung (SAMSUNG ELECTRONICS CO., LTD.)
Official title
Semiconductor device
Patent number
US12740055B2
Application number
18518293
Filed
Nov 22, 2023
Granted
Sep 15, 2026
Inventors
9
Claims
20

Classified under

H10B 12/50 Electricity & electronicsH10B 12/09 Electricity & electronicsH10B 12/315 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.