Samsung patents chip layout with taller bit lines for better shielding
This patent describes a specific arrangement of metal lines inside a memory chip. It places a shorter, shielding line next to a taller data line, with the taller line extending higher up and deeper down than the shield.
In the filing’s own words
A semiconductor device includes a lower structure, an interlayer insulating layer on the lower structure, a conductive shielding line on the lower structure and penetrating through the interlayer insulating layer, a capping insulating layer on the interlayer insulating layer and the conductive shielding line, and a bit line on the lower structure and penetrating through the capping insulating layer and the interlayer insulating layer. An upper surface of the bit line is at a higher level than an upper surface of the conductive shielding line. A lower surface of the bit line is at a level equal to or lower than a level of a lower surface of the conductive shielding line.
What exactly they claim (claim 1)
1. A semiconductor device comprising: a lower structure; an interlayer insulating layer on the lower structure; a conductive shielding line on the lower structure, the conductive shielding line penetrating through the interlayer insulating layer; a capping insulating layer on the interlayer insulating layer and the conductive shielding line; a bit line on the lower structure and penetrating through the capping insulating layer and the interlayer insulating layer, a vertical channel portion on the bit line; a word line facing a side surface of the vertical channel portion; and a dielectric structure between the side surface of the vertical channel portion and the word line; wherein an upper surface of the bit line is at a higher level than an upper surface of the conductive shielding line, and wherein a lower surface of the bit line is at a level equal to or lower than a level of a lower surface of the conductive shielding line.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- Semiconductor device including different conductive lines
- Patent number
- US12740053B2
- Application number
- 18243731
- Filed
- Sep 8, 2023
- Granted
- Sep 15, 2026
- Inventors
- 4
- Claims
- 18
Classified under
H10B 12/482 Electricity & electronicsH10B 12/02 Electricity & electronicsH10B 12/315 Electricity & electronicsH10B 12/50 Electricity & electronicsH10W 20/423 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.