Samsung patents image sensor circuit that adjusts clock delays for digital conversion
This patent describes an image sensor design that converts light data into digital signals using a specific analog-to-digital converter. It features a clock divider and delay circuits that create modified timing signals to help count the incoming pixel data accurately.
In the filing’s own words
An image sensor according to some example embodiments includes a pixel array outputting a pixel signal, a detection circuit determining a comparison result signal based on a reference signal and the pixel signal and outputting the comparison result signal, an analog-to-digital converter outputting a count result signal based on the comparison result signal, and a sense amplifier outputting an image signal based on the count result signal, the analog-digital converter including a divider generating a divided reference clock signal by dividing a reference clock signal, a delay circuit generating a first gray code signal by delaying the divided reference clock signal, a code generator generating second gray code signals having different periods from the first gray code signal based on the divided reference clock signal, and a delay control circuit providing a delay control signal that controls a delay time of the divided reference clock signal to the delay circuit.
What exactly they claim (claim 1)
1. An image sensor comprising: a pixel array configured to output a pixel signal; a detection circuit configured to determine a comparison result signal based on a reference signal and the pixel signal and output the comparison result signal; a gray code generator configured to generate a plurality of gray code signals based on an input clock signal; and a counter circuit configured to output a digital count result signal by counting the comparison result signal based on the plurality of gray code signals, the gray code generator including a delay circuit configured to generate a first gray code signal among the plurality of gray code signals by delaying the input clock signal; a code generator configured to generate a plurality of second gray code signals having a different period from the first gray code signal among the plurality of gray code signals based on the input clock signal; and a delay control circuit configured to provide a delay control signal controlling a delay time of the input clock signal to the delay circuit.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- Analog-digital converter and image sensor including the same
- Patent number
- US12739537B2
- Application number
- 19018460
- Filed
- Jan 13, 2025
- Granted
- Sep 15, 2026
- Inventors
- 1
- Claims
- 20
Classified under
H04N 25/78 Electricity & electronicsH04N 25/7795 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.