Samsung patents stacked chip design with protruding connection pads
Samsung describes a method for stacking two semiconductor chips vertically to save space. The top chip connects to the bottom one using a specific pad design where a small bump on the upper pad fits into the lower one to ensure a tight electrical connection.
In the filing’s own words
A semiconductor package includes a first semiconductor chip including a first semiconductor layer, a first through-electrode passing through the first semiconductor layer in a vertical direction, and a first bonding pad connected to the first through-electrode, and a second semiconductor chip including a second semiconductor layer on the first semiconductor chip, a wiring structure between the second semiconductor layer and the first semiconductor chip, a wiring pad connected to the wiring structure below the wiring structure, and a second bonding pad connected to the wiring pad below the wiring pad and in contact with the first bonding pad, wherein the second bonding pad includes a protrusion protruding toward the wiring pad.
What exactly they claim (claim 1)
1. A semiconductor package comprising: a first semiconductor chip including: a first semiconductor layer, a first through-electrode passing through the first semiconductor layer in a vertical direction, and a first bonding pad connected to the first through-electrode; and a second semiconductor chip including: a second semiconductor layer, the second semiconductor chip disposed on the first semiconductor chip, a wiring structure between the second semiconductor layer and the first semiconductor chip, a wiring pad connected to the wiring structure below the wiring structure, and a second bonding pad connected to the wiring pad and disposed below the wiring pad, wherein the second bonding pad contacts the first bonding pad and includes a top portion and a protrusion protruding from the top portion into the wiring pad.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- Semiconductor package and method of manufacturing the same
- Patent number
- US12733546B2
- Application number
- 18212461
- Filed
- Jun 21, 2023
- Granted
- Sep 8, 2026
- Inventors
- 3
- Claims
- 20
Classified under
H10W 90/00 Electricity & electronicsH10W 20/42 Electricity & electronicsH10W 70/611 Electricity & electronicsH10W 70/635 Electricity & electronicsH10W 70/60 Electricity & electronicsH10W 72/853 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.