Samsung patents chip stack with built-in heat sink for better cooling
Samsung has been granted a patent for a semiconductor design that stacks one chip package on top of another. The lower chip includes a specific heat sink pattern that aligns with the electrical connections, allowing heat to escape through the gap between the two layers.
In the filing’s own words
A semiconductor includes a lower structure, an upper structure on the lower structure, and a connection pattern between the lower structure and the upper structure. The connection pattern is configured to electrically connect the lower structure and the upper structure to each other. The lower structure includes a lower base and a first lower chip on the lower base. The first lower chip includes a chip bonding pad, a pad structure, and a heat sink structure. The connection pattern is connected to the upper structure and extends away from the upper structure to be connected to the pad structure. The pad structure has a thickness greater than a thickness of the chip bonding pad. At least a portion of the heat sink structure is at a same height level as at least a portion of the pad structure.
What exactly they claim (claim 1)
1. A semiconductor device, comprising: a lower semiconductor package, the lower semiconductor package including a lower base, a first lower chip on the lower base, and a lower mold layer on the first lower chip; an upper semiconductor package including at least one chip, the upper semiconductor package on the lower semiconductor package; a connection pattern between the lower semiconductor package and the upper semiconductor package, the connection pattern configured to electrically connect the lower semiconductor package and the upper semiconductor package to each other; and an empty space between the lower semiconductor package and the upper semiconductor package, wherein the first lower chip includes a body, a chip pad on the body, a pad structure on the body, a heat sink pattern on the body, and a redistribution line on the body and configured to electrically connect the chip pad and the pad structure to each other, wherein at least a portion of a side surface of the connection pattern is exposed by the empty space, and wherein at least a portion of an upper surface of the heat sink pattern is exposed by the empty space.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- Semiconductor device including lower semiconductor package having heat sink pattern
- Patent number
- US12733491B2
- Application number
- 18768963
- Filed
- Jul 10, 2024
- Granted
- Sep 8, 2026
- Inventors
- 5
- Claims
- 20
Classified under
H01L 23/367 Electricity & electronicsH01L 23/3157 Electricity & electronicsH01L 24/08 Electricity & electronicsH01L 24/48 Electricity & electronicsH01L 2224/02371 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.