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Samsung patents memory stack design with hydrogen barriers

Samsung describes a vertical memory chip design that places specific layers between the control circuits and the stacked memory cells. These layers act as barriers to stop hydrogen gas from moving up and damaging the sensitive electronics below.

Why it mattersThis is a technical improvement to chip manufacturing that helps protect internal components from chemical interference during the production process.

In the filing’s own words

A vertical nonvolatile memory device may include a peripheral circuit portion including a memory cell driving circuit and connection wiring; a first hydrogen diffusion barrier layer above the peripheral circuit portion; a first insulating layer above the first hydrogen diffusion barrier layer; a common source line layer above the first insulating layer; a second hydrogen diffusion barrier layer above the first insulating layer; and a memory cell stack structure above the common source line layer and the second hydrogen diffusion barrier layer.

What exactly they claim (claim 1)

1. A vertical nonvolatile memory device comprising: a peripheral circuit portion including a memory cell driving circuit and connection wiring; a first hydrogen diffusion barrier layer above the peripheral circuit portion; a first insulating layer above the first hydrogen diffusion barrier layer; a common source line layer above the first insulating layer; a second hydrogen diffusion barrier layer above the first insulating layer; and a memory cell stack structure above the common source line layer and the second hydrogen diffusion barrier layer, wherein the memory cell stack structure includes a plurality of gate electrodes and a plurality of interlayer insulating layers, which are alternately stacked on top of each other, wherein a lowermost one of the plurality of gate electrodes is on top of a lowermost one of the plurality of interlayer insulating layers.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
Vertical nonvolatile memory device having hydrogen diffusion barrier layer and manufacturing method thereof
Patent number
US12733172B2
Application number
18446911
Filed
Aug 9, 2023
Granted
Sep 8, 2026
Inventors
5
Claims
20

Classified under

H10B 43/40 Electricity & electronicsH10B 41/27 Electricity & electronicsH10B 41/40 Electricity & electronicsH10B 43/27 Electricity & electronicsH10W 20/435 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.