Samsung patents 3D memory design using specific metal layers
Samsung describes a 3D memory chip where layers of insulating material and conductive channels are stacked vertically. The design uses a diffusion stop layer and a crystalline semiconductor pattern with a higher concentration of a specific metal element to separate the channels.
In the filing’s own words
A three-dimensional nonvolatile memory device includes: a plurality of insulating layers stacked on a substrate in a vertical direction substantially perpendicular to a surface of the substrate; a plurality of channel layers positioned between the plurality of insulating layers, and elongated in a first horizontal direction that is parallel to the surface of the substrate, wherein the plurality of channel layers includes a first metal element; a diffusion stop layer conformally formed in a trench passing through the plurality of insulating layers and the plurality of channel layers in the vertical direction; and a crystalline semiconductor pattern between each of the plurality of channel layers and the diffusion stop layer, wherein the crystalline semiconductor pattern includes a second metal element, wherein a concentration of the second metal element in the crystalline semiconductor pattern is higher than a concentration of the first metal element in the plurality of channel layers.
What exactly they claim (claim 1)
1. A three-dimensional nonvolatile memory device comprising: a plurality of insulating layers stacked on a substrate in a vertical direction substantially perpendicular to a main surface of the substrate; a plurality of channel layers positioned between the plurality of insulating layers, and elongated in a first horizontal direction that is parallel to the main surface of the substrate, wherein the plurality of channel layers includes a first metal element; a diffusion stop layer conformally formed in a trench passing through the plurality of insulating layers and the plurality of channel layers in the vertical direction; and a crystalline semiconductor pattern between each of the plurality of channel layers and the diffusion stop layer, wherein the crystalline semiconductor pattern includes a second metal element, wherein a concentration of the second metal element in the crystalline semiconductor pattern is higher than a concentration of the first metal element in the plurality of channel layers.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- Three-dimensional nonvolatile memory device including a plurality of memory cells
- Patent number
- US12733163B2
- Application number
- 18586624
- Filed
- Feb 26, 2024
- Granted
- Sep 8, 2026
- Inventors
- 2
- Claims
- 20
Classified under
H10B 43/20 Electricity & electronicsH10D 62/127 Electricity & electronicsH10D 62/405 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.