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Samsung patents memory chip layout with wider dummy sections for stability

This filing describes a specific layout for semiconductor memory chips used in devices like phones and computers. It details how to arrange the tiny gates and active areas, using wider 'dummy' sections at the ends to improve the chip's reliability and performance.

Why it mattersIt is a routine improvement to chip manufacturing that aims to make memory components more stable, which is a standard part of keeping electronics reliable.

In the filing’s own words

A semiconductor memory device with improved performance and reliability is provided. The semiconductor memory device includes a substrate having a cell region and a peripheral region, a cell region isolation layer that separates the cell region from the peripheral region, and a plurality of cell gate structures, each including a cell gate electrode that extends in a first direction. The cell region includes a plurality of active areas that extend in a second direction different from the first direction, and are between a respective cell element isolation layer and the cell region isolation layer. Each of the active areas includes a first portion and a second portion separated by the cell gate structure, the second portion of the active area is on both sides of a respective one of the first portion of the active area. The active areas includes a normal active area and a dummy active area.

What exactly they claim (claim 1)

1. A semiconductor memory device comprising: a substrate comprising a cell region and a peripheral region; a cell region isolation layer that separates the cell region from the peripheral region; and a plurality of cell gate structures on the cell region of the substrate, each of the plurality of cell gate structures comprising a cell gate electrode that extends in a first direction, wherein the cell region of the substrate comprises a plurality of active areas that extend in a second direction different from the first direction, wherein the plurality of active areas are between the cell region isolation layer and a cell element isolation layer and between respective portions of the cell element isolation layer, wherein each of the plurality of active areas comprises a first portion and a second portion separated by one of the plurality of cell gate structures, wherein the second portion of a respective one of the plurality of active areas is on both sides of a respective one of the first portion of the plurality of active areas, wherein ones of the plurality of active areas are in a normal active area or a dummy active area, wherein a width of a first portion of the dummy active area in the first direction is greater than a width of a first portion of the normal active area in the first direction, wherein the plurality of cell gate structures comprises a head region at an end of the plurality of cell gate structures and a body region that extends from the head region in the first direction, wherein a width of the head region of the plurality of cell gate structures in a third direction perpendicular to the first direction increases from an end of the head region to a middle portion of the head region and the width of the head region decreases from the middle portion of the head region to the body region of the plurality of cell gate structures, and wherein at least a portion of the head region of the plurality of cell gate structures overlaps the respective one of the plurality of active areas and the cell element isolation layer in a direction perpendicular to the substrate.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
Semiconductor memory device
Patent number
US12733158B2
Application number
18350323
Filed
Jul 11, 2023
Granted
Sep 8, 2026
Inventors
6
Claims
20

Classified under

H10B 12/50 Electricity & electronicsH10B 12/315 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.