Samsung patents stacked word line design for memory chips
Samsung describes a semiconductor structure where the word line, a horizontal wire that controls memory cells, is split into two stacked sections. The lower section sits directly on the insulating layer, while the upper section contains additional gate electrodes to improve the connection.
In the filing’s own words
A semiconductor device includes a substrate including a word line trench extending in a first horizontal direction; a gate dielectric layer in the word line trench; a word line extending in the first horizontal direction and in a lower portion of the word line trench on the gate dielectric layer; an insulation capping layer extending in an upper portion of the word line trench on the word line; and a plurality of gate electrodes on the substrate, wherein the word line comprises: a word line lower region extending in the first horizontal direction and including a first gate electrode of the plurality of gate electrodes on the gate dielectric layer; and a word line upper region extending in the first horizontal direction on the word line lower region and including a plurality of second gate electrodes of the plurality of gate electrodes and the first gate electrode.
What exactly they claim (claim 1)
1. A semiconductor device comprising: a substrate including a word line trench extending in a first horizontal direction; a gate dielectric layer in the word line trench; a word line extending in the first horizontal direction and in a lower portion of the word line trench on the gate dielectric layer; an insulation capping layer extending in the first horizontal direction and in an upper portion of the word line trench on the word line; and a plurality of gate electrodes on the substrate, wherein the word line comprises: a word line lower region extending in the first horizontal direction and including a first gate electrode of the plurality of gate electrodes on the gate dielectric layer; and a word line upper region extending in the first horizontal direction on the word line lower region and including a plurality of second gate electrodes of the plurality of gate electrodes and the first gate electrode of the plurality of gate electrodes.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- Semiconductor devices and methods of manufacturing the same
- Patent number
- US12733156B2
- Application number
- 18435231
- Filed
- Feb 7, 2024
- Granted
- Sep 8, 2026
- Inventors
- 5
- Claims
- 20
Classified under
H10B 12/488 Electricity & electronicsH10D 64/661 Electricity & electronicsH10W 10/0145 Electricity & electronicsH10W 10/17 Electricity & electronicsH10B 12/34 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.