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Samsung patents memory chip using graphene to improve data storage

Samsung has been granted a patent for a semiconductor memory design that uses a specific stack of materials to store data. The invention places a layer of graphene, a single-atom-thick carbon material, on top of an oxide semiconductor layer within the memory channel. This structure sits between the bit line and the capacitor, which holds the electrical charge representing data.

Why it mattersThis design could potentially make memory chips more efficient or durable by leveraging the strong electrical properties of graphene, though it remains a technical component improvement rather than a new consumer product.

In the filing’s own words

A semiconductor memory device according to an embodiment includes: a substrate; a bit line positioned on the substrate and extending in a first direction; a channel accommodating insulating layer positioned on the substrate, and defining a channel trench exposing the bit line and extending in a second direction crossing the first direction; a channel layer extending along a bottom surface and a side surface of the channel trench and contacting the bit line; a word line positioned in the channel trench and extending in the second direction; a gate insulating layer positioned between the channel layer and the word line; and a capacitor structure positioned on the channel layer and electrically connected to the channel layer, in which the channel layer has a double layer structure of an oxide semiconductor layer and a first graphene layer.

What exactly they claim (claim 1)

1. A semiconductor memory device, comprising: a substrate; a bit line on the substrate and extending in a first direction; a channel accommodating insulating layer positioned on the substrate, and defining a channel trench extending in a second direction crossing the first direction; a channel layer extending along a bottom surface and a side surface of the channel trench and contacting the bit line; a word line in the channel trench and extending in the second direction; a gate insulating layer separating the channel layer from the word line; and a capacitor structure on the channel layer and electrically connected to the channel layer, wherein the channel layer has a double layer structure of an oxide semiconductor layer and a first graphene layer, and wherein, in a stacking direction perpendicular to the first direction, a portion of the first graphene layer is stacked on a portion of the oxide semiconductor layer which is stacked on a portion of the bit line.

Facts

Company
Samsung (SAMSUNG ELECTRONICS CO., LTD.)
Official title
Semiconductor memory device and method of manufacturing the same
Patent number
US12733148B2
Application number
18474394
Filed
Sep 26, 2023
Granted
Sep 8, 2026
Inventors
5
Claims
20

Classified under

H10B 12/315 Electricity & electronicsH10B 12/05 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.