Samsung patents method to tune flash memory circuits using simulation rewards
Samsung describes a computer-based method for designing flash memory chips by simulating how different transistor settings and voltages affect performance. The system calculates a score for each simulation and automatically adjusts the settings if the score is too low, repeating the process until the design meets a specific standard.
In the filing’s own words
An operating method of a circuit design system which includes a processor and a memory includes reading, at the processor, a circuit layout of a flash memory device including a page buffer from the memory, initializing, at the processor, a value of a first parameter of at least one transistor of the page buffer and a value of a second parameter of at least one voltage applied to the page buffer, performing, at the processor, circuit simulation on the page buffer using the initialized first and second parameters, and calculating, at the processor, a reward based on a result of the circuit simulation. The processor is configured to perform, in response to the reward being not greater than a threshold value, a subsequent action. The subsequent action includes adjust the value of the first parameter of the at least one transistor and the value of the second parameter of the at least one voltage, and perform subsequent circuit simulation on the page buffer using the adjusted first and second parameters.
What exactly they claim (claim 1)
1. An operating method of a circuit design system which includes a processor and a memory, the method comprising: reading, at the processor, a circuit layout of a flash memory device including a page buffer from the memory; initializing, at the processor, a value of a first parameter of at least one transistor of the page buffer and a value of a second parameter of at least one voltage applied to the page buffer; performing, at the processor, circuit simulation on the page buffer using the initialized first and second parameters; and calculating, at the processor, a reward based on a result of the circuit simulation, wherein in response to the reward being not greater than a threshold value, the processor is configured to perform a subsequent action, and wherein the subsequent action includes: adjust the value of the first parameter of the at least one transistor and the value of the second parameter of the at least one voltage; and perform subsequent circuit simulation on the page buffer using the adjusted first and second parameters.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- Electronic device for manufacturing of semiconductor device and operating method of electronic device
- Patent number
- US12731647B2
- Application number
- 18402356
- Filed
- Jan 2, 2024
- Granted
- Sep 8, 2026
- Inventors
- 4
- Claims
- 20
Classified under
G11C 16/26 Physics & computingG11C 5/063 Physics & computingG11C 16/0483 Physics & computingMore from Samsung in Chips & hardware
- Samsung patents chip that combines camera and screen Oct 13, 2026
- Samsung patents faster chip testing using machine learning Sep 1, 2026
- Samsung patents radar method to pinpoint target direction more accurately Sep 1, 2026
- Samsung patents memory chip that searches data by content, not address Sep 1, 2026
- Samsung patents chip design that skips empty data to speed up AI Sep 1, 2026
Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.