Samsung patents method to fine-tune chip printing using sample wafers
This patent describes a way to improve the accuracy of printing circuits onto silicon chips. It uses a test wafer to measure alignment errors and adjusts the settings before the real production wafers are processed.
In the filing’s own words
A method of controlling semiconductor process includes forming a plurality of sample overlay keys by irradiating a first dose of extreme ultraviolet (EUV) light to a first photoresist layer formed on at least one sample wafer; determining a sample correction parameter for correcting a sample overlay error measured from the plurality of sample overlay keys; updating the sample correction parameter based on a difference between the first dose and a second dose; forming a plurality of main overlay keys by irradiating a second dose of extreme ultraviolet light to a second photoresist layer formed on the sample wafer based on the updated sample correction parameter; determining the main correction parameter based on a main overlay error measured from the plurality of main overlay keys; and performing a photolithography process on a wafer different from the sample wafer based on the main correction parameter.
What exactly they claim (claim 1)
1. A method of controlling a semiconductor process, the method comprising: forming a first photoresist layer on at least one sample wafer; forming a plurality of sample overlay keys on the at least one sample wafer by radiating a first dose of extreme ultraviolet (EUV) light toward the first photoresist layer; measuring a sample overlay error from the plurality of sample overlay keys; determining a sample correction parameter for correcting the sample overlay error; updating the sample correction parameter into an updated sample correction parameter, based on a difference between the first dose of EUV light and a second dose of EUV light; forming a second photoresist layer on the at least one sample wafer; forming a plurality of main overlay keys on the at least one sample wafer by radiating the second dose of EUV light toward the second photoresist layer, based on the updated sample correction parameter; measuring a main overlay error from the plurality of main overlay keys; determining a main correction parameter based on the main overlay error; and performing a photolithography process on an additional wafer different from the at least one sample wafer, based on the main correction parameter.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- Method of controlling semiconductor process and semiconductor processing apparatus
- Patent number
- US12730380B2
- Application number
- 18218246
- Filed
- Jul 5, 2023
- Granted
- Sep 8, 2026
- Inventors
- 4
- Claims
- 16
Classified under
G03F 7/2004 Physics & computingG03F 7/70033 Physics & computingG03F 7/70558 Physics & computingG03F 1/70 Physics & computingMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.