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Nvidia patents chip feature to block saving certain instruction locations

Patent drawing
Patent drawing from the official filing.

Nvidia describes a processor design that stops specific memory spots from being used to save scheduled computer instructions. The system uses a standard software interface, or API, to decide which storage locations are blocked.

Why it mattersThis is a low-level chip design detail that helps manage how a processor handles tasks, which is interesting mainly to computer engineers rather than general users.

In the filing’s own words

Apparatuses, systems, and techniques to prevent one or more storage locations of one or more scheduled instructions from being stored. In at least one embodiment, one or more storage locations of one or more scheduled instructions are prevented from being stored based on, for example, an application programming interface (API).

What exactly they claim (claim 1)

1. A processor, comprising: one or more circuits to perform an application programming interface (API) to prevent one or more storage locations of one or more scheduled instructions from being stored.

Facts

Company
Nvidia (NVIDIA Corporation)
Official title
PREVENTING STORAGE OF LOCATIONS OF INSTRUCTIONS
Publication number
US20260329586A1
Application number
19181203
Filed
Apr 16, 2025
Published
Oct 22, 2026
Inventors
4
Claims
20

Classified under

G06F 9/3814 Physics & computingG06F 9/3836 Physics & computingG06F 9/541 Physics & computing
Read the full filing (official PDF) ↗ Open in the Patent Tracker

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.