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NvidiaPatent applicationChips & hardwareInterest 4/10

Nvidia patents a way for GPU parts to share data more efficiently

Patent drawing
Patent drawing from the official filing.

Nvidia describes a method for how a main processor in a graphics chip talks to a smaller helper chip. The system sends data to the helper, tells it to work, and then retrieves the finished results using a specific sequence of steps.

Why it mattersThis is a technical improvement to how internal parts of a graphics card communicate, which could lead to slightly faster or more stable performance in future chips.

In the filing’s own words

Systems and methods for an efficient and robust multiprocessor-coprocessor interface that may be used between a streaming multiprocessor and an acceleration coprocessor in a GPU are provided. According to an example implementation, in order to perform an acceleration of a particular operation using the coprocessor, the multiprocessor: issues a series of write instructions to write input data for the operation into coprocessor-accessible storage locations, issues an operation instruction to cause the coprocessor to execute the particular operation; and then issues a series of read instructions to read result data of the operation from coprocessor-accessible storage locations to multiprocessor-accessible storage locations.

What exactly they claim (claim 1)

1. A method performed by a multiprocessor to execute an operation on a communicatively coupled coprocessor, the method comprising: establishing a connection to the coprocessor; issuing a plurality of write instructions to write input data for the operation into coprocessor-accessible storage locations; issuing an operation instruction to cause the coprocessor to execute the operation using said input data; issuing a plurality of read instructions to read result data of the operation from coprocessor-accessible storage locations to multiprocessor-accessible storage locations; and closing the connection.

Facts

Company
Nvidia (NVIDIA Corporation)
Official title
ROBUST, EFFICIENT MULTIPROCESSOR-COPROCESSOR INTERFACE
Publication number
US20260319795A1
Application number
19463750
Filed
Jan 29, 2026
Published
Oct 15, 2026
Inventors
8
Claims
1

Classified under

G06F 9/3004 Physics & computingG06F 9/3877 Physics & computingG06F 15/163 Physics & computingG06T 1/20 Physics & computingG06T 2200/28 Physics & computing

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.