Nvidia patents circuit that aligns data and clock signals by matching voltage
Nvidia describes a communication circuit that fixes timing errors between data and clock signals. It works by adjusting the voltage strength of the data signal so it matches the clock signal's strength, ensuring they stay in sync.
In the filing’s own words
Technology related to calibrating synchronization of a data signal to a forwarded clock signal is described. A circuit includes a receiver circuit and a clock-to-data synchronization circuit. The receiver circuit receives a data signal and includes two inverters and two resistors. The clock-to-data synchronization circuit receives the data signal and the clock signal and determines an indication of synchronization between the data and clock signals. The clock-to-data synchronization circuit adjusts, using the indication, a parameter of the receiver circuit to synchronize the data signal and the clock signal.
What exactly they claim (claim 1)
1. A communication circuit comprising: a data path; a clock path; and circuitry configured to compensate for skew between a data signal of the data path and a clock signal of the clock path by adjusting a peak-to-peak voltage amplitude of the data signal to match a peak-to-peak voltage amplitude of the clock signal.
Facts
- Company
- Nvidia (NVIDIA Corporation)
- Official title
- CLOCK-TO-DATA SYNCHRONIZATION
- Publication number
- US20260299641A1
- Application number
- 19705208
- Filed
- Jun 11, 2026
- Published
- Oct 1, 2026
- Inventors
- 2
- Claims
- 20
Classified under
G06F 1/12 Physics & computingG06F 13/1689 Physics & computingG06F 1/10 Physics & computingG06F 13/4217 Physics & computingG06F 13/423 Physics & computingG06F 13/4243 Physics & computingMore from Nvidia in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.