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Sony patents memory circuit design to shrink semiconductor devices

Sony has filed a patent for a memory circuit that uses a transistor to control voltage applied to a resistive element. The design includes a unit that adjusts the electrical resistance of the power supply line to fine-tune the voltage reaching the memory cell. This approach aims to make the overall memory circuit smaller.

Why it mattersThis is a technical improvement in chip design that could help manufacturers pack more memory into smaller spaces, though it does not describe a specific consumer product.

In the filing’s own words

To achieve miniaturization of a memory circuit. The memory circuit includes a memory cell and an applied voltage adjustment unit. The memory cell included in the memory circuit is equipped with: a resistive element; and a cell transistor that is connected to one end of the resistive element and controls a voltage to be applied to the resistive element. The applied voltage adjustment unit included in the memory circuit adjusts an impedance of an impedance element connected in series to a power supply line that supplies power to the memory cell so as to adjust the voltage to be applied to the memory cell.

What exactly they claim (claim 1)

1. A memory circuit comprising: a memory cell, the memory cell being equipped with a resistive element and a cell transistor, the cell transistor being connected to one end of the resistive element and configured to control a voltage to be applied to the resistive element; and an applied voltage adjustment unit, the applied voltage adjustment unit configured to adjust impedance of an impedance element connected in series to a power supply line that supplies power to the memory cell so as to adjust a voltage to be applied to the memory cell.

Facts

Company
Sony (SONY SEMICONDUCTOR SOLUTIONS CORPORATION)
Official title
MEMORY CIRCUIT, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE
Publication number
US20260282882A1
Application number
19167280
Filed
Mar 25, 2024
Published
Sep 17, 2026
Inventors
1
Claims
12

Classified under

H10W 20/43 Electricity & electronicsG11C 11/1697 Physics & computingH10B 61/22 Electricity & electronicsH10W 20/427 Electricity & electronicsH10W 20/435 Electricity & electronicsH10N 50/10 Electricity & electronics
Read the full filing (official PDF) ↗ Open in the Patent Tracker

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.