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SonyPatent applicationChips & hardwareInterest 4/10

Sony patents chip package design to boost data speed

Sony describes a semiconductor package where a chip is attached to a metal plate with a hole in it. The design uses a specific arrangement of wires and metal layers to improve how fast data moves through the component.

Why it mattersThis is a technical improvement to how computer chips are built, which could help make future processors or memory faster.

In the filing’s own words

A high-speed transmission characteristic is improved in a semiconductor package in which a semiconductor chip is connected to a package substrate by a wire. A semiconductor package includes a package substrate, a semiconductor chip, a lead terminal, and a wire. In the package substrate, a wiring layer is stacked on a predetermined surface of a metal plate in which a through-hole is formed. In a semiconductor chip, a connection pad is disposed on a front surface, and a back surface with respect to the front surface is adhered to the metal plate. A height from a surface not in contact with the metal plate out of both surfaces of the wiring layer to a connection point of the lead terminal is higher than a predetermined surface of the metal plate. The wire connects the connection point of the lead terminal and the connection pad.

What exactly they claim (claim 1)

1. A semiconductor package comprising: a package substrate obtained by stacking a wiring layer on a predetermined surface of a metal plate on which a through hole is formed; a semiconductor chip on a front surface of which a connection pad is disposed, the semiconductor chip in which a rear surface with respect to the front surface is adhered to the metal plate; a lead terminal in which a height from a surface not in contact with the metal plate out of both surfaces of the wiring layer to a connection point is higher than the predetermined surface of the metal plate; and a wire that connects the connection point of the lead terminal to the connection pad.

Facts

Company
Sony (SONY SEMICONDUCTOR SOLUTIONS CORPORATION)
Official title
SEMICONDUCTOR PACKAGE, SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE
Publication number
US20260271752A1
Application number
19166117
Filed
Feb 2, 2024
Published
Sep 10, 2026
Inventors
1
Claims
17

Classified under

H10W 70/63 Electricity & electronicsH10W 72/019 Electricity & electronicsH10W 72/90 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.